Nishtha Sharma

According to our database1, Nishtha Sharma authored at least 4 papers between 2017 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2018
Compact Modeling and Design of Magneto-Electric Transistor Devices and Circuits.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017
The importance of benchmarking for charge-based and beyond CMOS devices.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Magneto-electric magnetic tunnel junction based analog circuit options.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Verilog - A compact model of a ME-MTJ based XNOR/NOR gate.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017


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