gem5-SysXelerator: A Full-System Simulator for Accelerator Architectures. - Sebastian Fischer; Nithya Raj; Alberto García-Ortiz (ISVLSI, 2025)

Configurable Hardware Module for Low-Power Coding in Heterogeneous-Monolithic 3D NoC Links. - Adriano Lopes Pata; Nithya Raj; Alberto García-Ortiz (ISVLSI, 2025)