Communication centric on-chip power grid models for networks-on-chip. - Nizar Dahir; Terrence S. T. Mak; Alex Yakovlev (VLSI-SoC, 2011)

Minimizing power supply noise through harmonic mappings in networks-on-chip. - Nizar Dahir; Terrence S. T. Mak; Fei Xia 001; Alex Yakovlev (CODES+ISSS, 2012)

Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip. - Nizar Dahir; Ra'ed Al-Dujaily; Alex Yakovlev; Petros Missailidis; Terrence S. T. Mak (NoCArc@MICRO, 2012)

Highly adaptive and deadlock-free routing for three-dimensional networks-on-chip. - Nizar Dahir; Terrence S. T. Mak; Ra'ed Al-Dujaily; Alex Yakovlev (IET Comput. Digit. Tech., 2013)

Dynamic programming-based runtime thermal management (DPRTM): An online thermal control strategy for 3D-NoC systems. - Ra'ed Al-Dujaily; Nizar Dahir; Terrence S. T. Mak; Fei Xia 001; Alex Yakovlev (ACM Trans. Design Autom. Electr. Syst., 2013)

Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip. - Ammar Karkar; Nizar Dahir; Ra'ed Al-Dujaily; Kenneth Tong; Terrence S. T. Mak; Alex Yakovlev (DATE, 2014)

Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip. - Nizar Dahir; Ghaith Tarawneh; Terrence S. T. Mak; Ra'ed Al-Dujaily; Alex Yakovlev (PDP, 2014)

Modeling and Tools for Power Supply Variations Analysis in Networks-on-Chip. - Nizar Dahir; Terrence S. T. Mak; Fei Xia 001; Alexandre Yakovlev (IEEE Trans. Computers, 2014)

Thermal Optimization in Network-on-Chip-Based 3D Chip Multiprocessors Using Dynamic Programming Networks. - Nizar Dahir; Ra'ed Al-Dujaily; Terrence S. T. Mak; Alex Yakovlev (ACM Trans. Embed. Comput. Syst., 2014)

Characterisation of feasibility regions in FPGAs under adaptive DVFS. - Nizar Dahir; Pedro B. Campos; Gianluca Tempesti; Martin Trefzer; Andrew M. Tyrrell (FPL, 2015)

MEMS-based power delivery control for bursty applications. - Haider Alrudainy; Andrey Mokhov; Nizar S. Dahir; Alex Yakovlev (ISCAS, 2016)

XL-STaGe: A cross-layer scalable tool for graph generation, evaluation and implementation. - Pedro B. Campos; Nizar Dahir; Colin Bonney; Martin Trefzer; Andy M. Tyrrell; Gianluca Tempesti (SAMOS, 2016)

Fault tolerant task mapping on many-core arrays. - Colin Bonney; Pedro B. Campos; Nizar Dahir; Gianluca Tempesti (SSCI, 2016)

Optimized task graph mapping on a many-core neuromorphic supercomputer. - Indar Sugiarto; Pedro B. Campos; Nizar Dahir; Gianluca Tempesti; Steve B. Furber (HPEC, 2017)

LeAF: A low-overhead asymmetric frequency controller for NoC router interconnects. - Pedro B. Campos; Nizar Dahir; Martin Trefzer; Andy M. Tyrrell; Gianluca Tempesti (VLSI-SoC, 2017)

Network-on-Chip Multicast Architectures Using Hybrid Wire and Surface-Wave Interconnects. - Ammar Karkar; Terrence S. T. Mak; Nizar Dahir; Ra'ed Al-Dujaily; Kin-Fai Tong; Alex Yakovlev (IEEE Trans. Emerg. Top. Comput., 2018)

Power density aware application mapping in mesh-based network-on-chip architecture: An evolutionary multi-objective approach. - Nizar Dahir; Ammar Karkar; Maurizio Palesi; Terrence S. T. Mak; Alex Yakovlev (Integr., 2021)

Thermal and Performance Efficient On-Chip Surface-Wave Communication for Many-Core Systems in Dark Silicon Era. - Ammar Karkar; Nizar Dahir; Terrence S. T. Mak; Kin-Fai Tong (ACM J. Emerg. Technol. Comput. Syst., 2022)