A High Precision IDDQ Measurement System With Improved Dynamic Load Regulation. - Nobuhiro Sato; Yoshihiro Hashimoto (ITC, 2003)

18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications. - Jun Tanabe; Toru Sano; Yutaka Yamada; Tomoki Watanabe; Mayu Okumura; Manabu Nishiyama; Tadakazu Nomura; Kazushige Oma; Nobuhiro Sato; Moriyasu Banno; Hiroo Hayashi; Takashi Miyamori (ISSCC, 2015)

A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications. - Yutaka Yamada; Toru Sano; Yasuki Tanabe; Yutaro Ishigaki; Soichiro Hosoda; Fumihiko Hyuga; Akira Moriya; Ryuji Hada; Atsushi Masuda; Masato Uchiyama; Tomohiro Koizumi; Takanori Tamai; et al. (ISSCC, 2019)

A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications. - Yutaka Yamada; Masato Uchiyama; Masashi Jobashi; Tomohiro Koizumi; Takanori Tamai; Nobuhiro Sato; Jun Tanabe; Katsuyuki Kimura; Yoshinari Ojima; Ryusuke Murakami; Takashi Yoshikawa; Toru Sano; et al. (IEEE J. Solid State Circuits, 2020)