GaAs MESFET multi-output current mirrors and their application to high frequency filters. - Nobukazu Takai; Nobuo Fujii (ICECS, 1998)

Rail-to-rail OTA utilizing linear V-I conversion circuit using single channel MOSFETs for input stage. - Nobukazu Takai; Shinji Nomura (ECCTD, 2005)

Rail-to-Rail OTA Utilizing Linear V-I Conversion Circuit Whose Input Stage is Composed of Single Channel MOSFETs. - Nobukazu Takai; Keigo Kawai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Rail-to-Rail OTA Based on Signal Decomposition. - Nobukazu Takai; Shigetaka Takagi; Nobuo Fujii (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Compensation method of amplitude error in sawtooth wave generator. - Nobukazu Takai; Yukihiro Fujimura (ECCTD, 2007)

New architecture for envelope-tracking power amplifier for base station. - Akihiro Kanbe; Masato Kaneta; Fuminori Yui; Haruo Kobayashi 001; Nobukazu Takai; Tatsuhiro Shimura; Hitoshi Hirata; Kentarou Yamagishi (APCCAS, 2008)

SAR ADC algorithm with redundancy. - Tomohiko Ogawa; Haruo Kobayashi 001; Masao Hotta; Yosuke Takahashi; Hao San; Nobukazu Takai (APCCAS, 2008)

A Time-to-Digital Converter with small circuitry. - Kazuya Shimizu; Masato Kaneta; HaiJun Lin; Haruo Kobayashi 001; Nobukazu Takai; Masao Hotta (ASP-DAC, 2009)

EMI Reduction by Spread-Spectrum Clocking in Digitally-Controlled DC-DC Converters. - Ibuki Mori; Yoshihisa Yamada; Santhos A. Wibowo; Masashi Kono; Haruo Kobayashi 001; Yukihiro Fujimura; Nobukazu Takai; Toshio Sugiyama; Isao Fukai; Norihisa Onishi; Ichiro Takeda; Jun-Ichi Matsuda (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Steep Down-Slope Sawtooth Wave Generator Utilizing Two Triangluar Waves Exclusively. - Nobukazu Takai; Yukihiro Fujimura (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Stochastic TDC architecture with self-calibration. - Satoshi Ito; Shigeyuki Nishimura; Haruo Kobayashi 001; Satoshi Uemori; Yohei Tan; Nobukazu Takai; Takahiro J. Yamaguchi; Kiichi Niitsu (APCCAS, 2010)

SAR ADC that is configurable to optimize yield. - Tomohiko Ogawa; Haruo Kobayashi 001; Yohei Tan; Satoshi Ito; Satoshi Uemori; Nobukazu Takai; Kiichi Niitsu; Takahiro J. Yamaguchi; Tatsuji Matsuura; Nobuyoshi Ishikawa (APCCAS, 2010)

Non-binary SAR ADC with digital error correction for low power applications. - Tomohiko Ogawa; Tatsuji Matsuura; Haruo Kobayashi 001; Nobukazu Takai; Masao Hotta; Hao San; Akira Abe; Katsuyoshi Yagi; Toshihiko Mori (APCCAS, 2010)

Single inductor DC-DC converter with bipolar outputs using charge pump. - Kenji Takahashi; Hajime Yokoo; Shyunsuke Miwa; Kengo Tsushida; Hiroyuki Iwase; Kazuki Murakami; Nobukazu Takai; Haruo Kobayashi 001; Takahiro Odaguchi; Shigeki Takayama; Isao Fukai; Jun-Ichi Matsuda (APCCAS, 2010)

ADC linearity test signal generation algorithm. - Satoshi Uemori; Takahiro J. Yamaguchi; Satoshi Ito; Yohei Tan; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Nobuyoshi Ishikawa (APCCAS, 2010)

SAR ADC Algorithm with Redundancy and Digital Error Correction. - Tomohiko Ogawa; Haruo Kobayashi 001; Yosuke Takahashi; Nobukazu Takai; Masao Hotta; Hao San; Tatsuji Matsuura; Akira Abe; Katsuyoshi Yagi; Toshihiko Mori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

Design for Testability That Reduces Linearity Testing Time of SAR ADCs. - Tomohiko Ogawa; Haruo Kobayashi 001; Satoshi Uemori; Yohei Tan; Satoshi Ito; Nobukazu Takai; Takahiro J. Yamaguchi; Kiichi Niitsu (IEICE Trans. Electron., 2011)

DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control. - Hong Gao 006; Lin Xing; Yasunori Kobori; Feng Zhao; Haruo Kobayashi 001; Shyunsuke Miwa; Atsushi Motozawa; Zachary Nosker; Kiichi Niitsu; Nobukazu Takai; Takahiro Odaguchi; Isao Nakanishi; et al. (APCCAS, 2012)

Digitally-controlled Gm-C bandpass filter. - Guanglei Jin; Hao Chen; Chuan Gao; Yunpeng Zhang; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Khayrollah Hadidi (APCCAS, 2012)

Single inductor dual output DC-DC converter design with exclusive control. - Yasunori Kobori; Qiulin Zhu; Murong Li; Feng Zhao; Zachary Nosker; Shu Wu; Shaiful N. Mohyar; Masanori Onozawa; Haruo Kobayashi 001; Nobukazu Takai; Kiichi Niitsu; Takahiro Odaguchi; et al. (APCCAS, 2012)

Multi-bit sigma-delta TDC architecture with self-calibration. - Satoshi Uemori; Masamichi Ishii; Haruo Kobayashi 001; Yuta Doi; Osamu Kobayashi; Tatsuji Matsuura; Kiichi Niitsu; Yuta Arakawa; Daiki Hirabayashi; Yuji Yano; Tatsuhiro Gake; Nobukazu Takai; et al. (APCCAS, 2012)

An Analysis of Stochastic Self-Calibration of TDC Using Two Ring Oscillators. - Kentaroh Katoh; Yuta Doi; Satoshi Ito; Haruo Kobayashi 001; Ensi Li; Nobukazu Takai (Asian Test Symposium, 2013)

Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. - Satoshi Uemori; Masamichi Ishii; Haruo Kobayashi 001; Daiki Hirabayashi; Yuta Arakawa; Yuta Doi; Osamu Kobayashi; Tatsuji Matsuura; Kiichi Niitsu; Yuji Yano; Tatsuhiro Gake; Takahiro J. Yamaguchi; et al. (J. Electron. Test., 2013)

Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter. - Yasunori Kobori; Takuya Arafune; Nobukazu Tsukiji; Nobukazu Takai; Haruo Kobayashi 001 (ASICON, 2015)

EMI reduction by analog noise spread spectrum in new ripple controlled converter. - Yasunori Kobori; Taifeng Wang; Nobukazu Tsukiji; Nobukazu Takai; Haruo Kobayashi 001 (ASICON, 2015)

Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm. - Yoshiki Sugawara; Nobukazu Takai; Masato Kato; Hiroaki Seki; Kento Suzuki; Haruo Kobayashi 001 (ASICON, 2015)

High efficiency single-inductor dual-output DC-DC converter with ZVS-PWM control. - Yoshiki Sunaga; Naoya Shiraishi; Koyo Asaishi; Nobukazu Tsukiji; Yasunori Kobori; Nobukazu Takai; Haruo Kobayashi 001 (ASICON, 2015)

Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization. - Kento Suzuki; Nobukazu Takai; Masato Kato; Hiroaki Seki; Yoshiki Sugawara; Haruo Kobayashi 001 (ASICON, 2015)

Automatic design of RC polyphase filters with small element value spread using genetic algorithm. - Nobukazu Takai; Yoshiki Sugawara; Kento Suzuki; Takayuki Negishi; Hiroaki Seki; Masato Kato (ISPACS, 2015)

Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control. - Manimel Wadu Sahan Dulara; Nobukazu Tsukiji; Yasunori Kobori; Koyo Asaishi; Nobukazu Takai; Haruo Kobayashi 001 (ISPACS, 2017)

OP-AMP sizing by inference of element values using machine learning. - Masafumi Fukuda; Tsukasa Ishii; Nobukazu Takai (ISPACS, 2017)

Automatic design of the analog integrated circuit based on Equation-Based and Characterize results. - Tsukasa Ishii; Nobukazu Takai; Masafumi Fukuda (ISPACS, 2017)

Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters. - Yasunori Kobori; Nobukazu Tsukiji; Takuya Arafune; Manimel Wadu Sahan; Dulara Yifei Sun; Nobukazu Takai; Haruo Kobayashi 001 (ISPACS, 2017)

EMI reduction technique with noise spread spectrum using swept frequency modulation for hysteretic DC-DC converters. - Natsuko Miki; Nobukazu Tsukiji; Koyo Asaishi; Yasunori Kobori; Nobukazu Takai; Hamo Kobayashi (ISPACS, 2017)

Automatic Design of Operational Amplifier Utilizing both Equation-Based Method and Genetic Algorithm. - Kento Suzuki; Nobukazu Takai; Yoshiki Sugawara; Masato Kato (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

Output Voltage Ripple Compensation for Switching Power Supply in EMI Reduction Method with Theoretical Analysis. - Takayuki Arai; Natsuko Miki; Yifei Sun; Nobukazu Takai (ISPACS, 2018)

Inference of Suitable for Required Specification Analog Circuit Topology using Deep Learning. - Teruki Matsuba; Nobukazu Takai; Masafumi Fukuda; Yusuke Kubo (ISPACS, 2018)

Self-improvement of OPAmp parameters using Q-Learning. - Nobukazu Takai; Masafumi Fukuda; Masahiro Saruta (SMACD, 2019)

Determination of circuit topology and element values from desired characteristics by machine learning. - Akihiro Saito; Nobukazu Takai; Satoshi Konno (ICECS, 2020)

Op-Amp sizing with large number of design variables using TuRBO. - Tsuyoshi Masubuchi; Nobukazu Takai (APCCAS, 2024)

Continuous-Time Modeling of a Hysteretic DC-DC Converter Using an Amplifier Model in Place of the Hysteretic Comparator. - Yasuhiro Sugimoto; Nobukazu Takai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2025)

GNN-Opt: Enhancing Automated Circuit Design Optimization with Graph Neural Networks. - Kazuya Yamamoto; Nobukazu Takai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2025)