An 8 ns 256 K BiCMOS RAM. - Nobuo Tamba; Shuuichi Miyaoka; Masanori Odaka; Katsumi Ogiue; Kouichirou Yamada; Takahide Ikeda; Mitsuru Hirao; Hisayuki Higuchi; Hideaki Uchida (IEEE J. Solid State Circuits, 1989)

A 1.5-ns access time, 78- mu m2 memory-cell size, 64-kb ECL-CMOS SRAM. - Kunihiko Yamaguchi; Hiroaki Nambu; Kazuo Kanetani; Youji Idei; Noriyuki Homma; Toshiro Hiramoto; Nobuo Tamba; Kunihiko Watanabe; Masanori Odaka; Takahide Ikeda; Kenichi Ohhata; Yoshiaki Sakurai (IEEE J. Solid State Circuits, 1992)

High-speed sensing techniques for ultrahigh-speed SRAMs. - Hiroaki Nambu; Kazuo Kanetani; Youji Idei; Noriyuki Homma; Kunihiko Yamaguchi; Toshiro Hiramoto; Nobuo Tamba; Masanori Odaka; Kunihiko Watanabe; Takahide Ikeda; Kenichi Ohhata; Yoshiaki Sakurai (IEEE J. Solid State Circuits, 1992)

A 1.5-ns 256-kb BiCMOS SRAM with 60-ps 11-K logic gates. - Nobuo Tamba; Akio Anzai; Kazuhiro Akimoto; Masayuki Ohayashi; Toshiro Hiramoto; Tadanori Kokubu; Sohei Ohmori; Tetsuya Muraya; Atsuyuki Kishimoto; Sousuke Tsuji; Hideki Hayashi; Nadateru Handa; et al. (IEEE J. Solid State Circuits, 1994)

A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory cell efficiency of 33%. - Yuji Yokoyama; Nybutaka Itoh; Masap Katayama; Kazumasa Takashima; Hiroshi Akasaki; Masayuki Kaneda; Toshitsugu Ueda; Yousuke Tanaka; Eiji Yamasaki; Masaya Todokoro; Keinosuke Toriyama; Hiroshi Miki; et al. (CICC, 2000)

A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%. - Yuji Yokoyama; Nobutaka Itoh; Masatoshi Hasegawa; Masahiro Katayama; Hiroshi Akasaki; Masayuki Kaneda; Toshitsugu Ueda; Yousuke Tanaka; Eiji Yamasaki; Masaya Todokoro; Keinosuke Toriyama; Hiroshi Miki; et al. (IEEE J. Solid State Circuits, 2001)

Implementation of Computer-Aided Diagnosis System on Customizable DSP Core for Colorectal Endoscopic Images with CNN Features and SVM. - Takumi Okamoto; Tetsushi Koide; Shigeto Yoshida; Hiroshi Mieno; Hiroshi Toishi; Takayuki Sugawara; Masayuki Tsuji; Masayuki Odagawa; Nobuo Tamba; Toru Tamaki; Bisser Raytchev; Kazufumi Kaneda; et al. (TENCON, 2018)

A Hardware Implementation of Colorectal Tumor Classification for Endoscopic Video on Customizable DSP Toward Real-Time Computer-Aided Diagnosis System. - Masayuki Odagawa; Takumi Okamoto; Tetsushi Koide; Toru Tamaki; Bisser Raytchev; Kazufumi Kaneda; Shigeto Yoshida; Hiroshi Mieno; Shinji Tanaka; Takayuki Sugawara; Hiroshi Toishi; Masayuki Tsuji; et al. (ISCAS, 2019)

A Hardware Implementation on Customizable Embedded DSP Core for Colorectal Tumor Classification with Endoscopic Video toward Real-Time Computer-Aided Diagnosais System. - Masayuki Odagawa; Takumi Okamoto; Tetsushi Koide; Toru Tamaki; Bisser Raytchev; Kazufumi Kaneda; Shigeto Yoshida; Hiroshi Mieno; Shinji Tanaka; Takayuki Sugawara; Hiroshi Toishi; Masayuki Tsuji; et al. (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021)