Layered blind deconvolution with interband prediction. - Hirokazu Masuda; Nobutaka Kuroki; Masahiro Numa; Kotaro Hirano (Syst. Comput. Jpn., 2000)

Adaptive arithmetic coding for image prediction errors. - Nobutaka Kuroki; Takahiro Manabe; Masahiro Numa (ISCAS (3), 2004)

An Evaluation of Triple Density Error Diffusion for Medical Monochrome LCDs. - Nobutaka Kuroki; Nobuhiro Oka; Masahiro Numa; Keisuke Yamamoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits. - Kosuke Shioki; Narumi Okada; Toshiro Ishihara; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities. - Tetsuya Hirose; Yuji Osaki; Nobutaka Kuroki; Masahiro Numa (ESSCIRC, 2010)

Super-resolution technique for thermography with dual-camera system. - Shingo Chikamatsu; Tomohiro Nakaya; Masakazu Kouda; Nobutaka Kuroki; Tetsuya Hirose; Masahiro Numa (ISCAS, 2010)

An Error Diagnosis Technique Based on Clustering of Elements. - Kosuke Shioki; Narumi Okada; Kosuke Watanabe; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

A 95-nA, 523ppm/°C, 0.6-μW CMOS current reference circuit with subthreshold MOS resistor ladder. - Yuji Osaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (ASP-DAC, 2011)

A 18.9-nA standby current comparator with adaptive bias current generator. - Kosuke Isono; Tetsuya Hirose; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa (A-SSCC, 2011)

A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs. - Yuji Osaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (ESSCIRC, 2011)

A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs. - Yuji Osaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (IEICE Electron. Express, 2011)

Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit. - Kei Matsumoto; Tetsuya Hirose; Yuji Osaki; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Electron., 2011)

Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique. - Yuji Osaki; Tetsuya Hirose; Kei Matsumoto; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Electron., 2011)

A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs. - Yumiko Tsuruya; Tetsuya Hirose; Yuji Osaki; Nobutaka Kuroki; Masahiro Numa; Osamu Kobayashi (ESSCIRC, 2012)

A low-power single-slope analog-to-digital converter with digital PVT calibration. - Yuji Osaki; Tetsuya Hirose; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa (ICECS, 2012)

A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator. - Keishi Tsubaki; Tetsuya Hirose; Yuji Osaki; Seiichiro Shiga; Nobutaka Kuroki; Masahiro Numa (ICECS, 2012)

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs. - Yuji Osaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (IEEE J. Solid State Circuits, 2012)

A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application. - Keishi Tsubaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (ESSCIRC, 2013)

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs. - Yuji Osaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (IEEE J. Solid State Circuits, 2013)

A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters. - Toshihiro Ozaki; Tetsuya Hirose; Takahiro Nagai; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa (ESSCIRC, 2014)

A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis. - Yuzuru Shizuku; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa; Mitsuji Okada (NEWCAS, 2014)

A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit. - Keishi Tsubaki; Tetsuya Hirose; Yuji Osaki; Seiichiro Shiga; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Electron., 2014)

A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters. - Toshihiro Ozaki; Tetsuya Hirose; Takahiro Nagai; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa (ASP-DAC, 2015)

A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting. - Toshihiro Ozaki; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa (A-SSCC, 2015)

A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs. - Ryo Matsuzuka; Tetsuya Hirose; Yuzuru Shizuku; Nobutaka Kuroki; Masahiro Numa (ISCAS, 2015)

Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation. - Yuzuru Shizuku; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa; Mitsuji Okada (IEICE Electron. Express, 2015)

An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs. - Yuzuru Shizuku; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa; Mitsuji Okada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)

A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs. - Keishi Tsubaki; Tetsuya Hirose; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Electron., 2015)

A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management. - Toshihiro Ozaki; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa (A-SSCC, 2016)

A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability. - Hiroki Asano; Tetsuya Hirose; Keishi Tsubaki; Taro Miyoshi; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa (ESSCIRC, 2016)

A fully integrated, 1-µs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems. - Hiroki Asano; Tetsuya Hirose; Taro Miyoshi; Keishi Tsubaki; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa (NEWCAS, 2016)

Image super-resolution with multi-channel convolutional neural networks. - Yu Kato; Shinya Ohtani; Nobutaka Kuroki; Tetsuya Hirose; Masahiro Numa (NEWCAS, 2016)

A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting. - Toshihiro Ozaki; Tetsuya Hirose; Takahiro Nagai; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016)

Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting. - Toshihiro Ozaki; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa (IEEE J. Solid State Circuits, 2016)

Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems. - Hiroki Asano; Tetsuya Hirose; Taro Miyoshi; Keishi Tsubaki; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa (ASP-DAC, 2017)

An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting. - Takanori Sato; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa (ICECS, 2017)

A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting. - Yuto Tsuji; Tetsuya Hirose; Toshihiro Ozaki; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa (ICECS, 2017)

An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications. - Hiroki Asano; Tetsuya Hirose; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa (ISCAS, 2017)

Multi-Channel Convolutional Neural Networks for Image Super-Resolution. - Shinya Ohtani; Yu Kato; Nobutaka Kuroki; Tetsuya Hirose; Masahiro Numa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs. - Ryo Matsuzuka; Tetsuya Hirose; Yuzuru Shizuku; Kyohei Shinonaga; Nobutaka Kuroki; Masahiro Numa (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices. - Shuto Kanzaki; Tetsuya Hirose; Hiroki Asano; Yuichiro Nakazawa; Nobutaka Kuroki; Masahiro Numa (ICECS, 2018)

Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting. - Yuichiro Nakazawa; Tetsuya Hirose; Toshihiro Ozaki; Yuto Tsuji; Shuto Kanzaki; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa (ISCAS, 2018)

An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems. - Kaori Matsumoto; Tetsuya Hirose; Hiroki Asano; Yuto Tsuji; Yuichiro Nakazawa; Nobutaka Kuroki; Masahiro Numa (VLSI-SoC, 2018)

A Sub-1-µs Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems. - Hiroki Asano; Tetsuya Hirose; Taro Miyoshi; Keishi Tsubaki; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Electron., 2018)

Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost Converter. - Masaya Nishi; Yuichiro Nakazawa; Kaori Matsumoto; Nobutaka Kuroki; Masahiro Numa; Ryo Matsuzuka; Osamu Maida; Daisuke Kanemoto; Tetsuya Hirose (ICECS, 2019)

A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting. - Masaya Nishi; Kaori Matsumoto; Nobutaka Kuroki; Masahiro Numa; Hikaru Sebe; Ryo Matsuzuka; Osamu Maida; Daisuke Kanemoto; Tetsuya Hirose (NEWCAS, 2020)

Detecting tampered regions in JPEG images via CNN. - Kunihiko Taya; Nobutaka Kuroki; Naoto Takeda; Tetsuya Hirose; Masahiro Numa (NEWCAS, 2020)

An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems. - Kaori Matsumoto; Hiroki Asano; Yuichiro Nakazawa; Nobutaka Kuroki; Masahiro Numa; Osamu Maida; Daisuke Kanemoto; Tetsuya Hirose (IEICE Electron. Express, 2020)

Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution. - Kazuya Urazoe; Nobutaka Kuroki; Yu Kato; Shinya Ohtani; Tetsuya Hirose; Masahiro Numa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020)

A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs. - Masaya Nishi; Kaori Matsumoto; Nobutaka Kuroki; Masahiro Numa; Hikaru Sebe; Ryo Matsuzuka; Osamu Maida; Daisuke Kanemoto; Tetsuya Hirose (IEICE Electron. Express, 2021)

Multi-Category Image Super-Resolution with Convolutional Neural Network and Multi-Task Learning. - Kazuya Urazoe; Nobutaka Kuroki; Yu Kato; Shinya Ohtani; Tetsuya Hirose; Masahiro Numa (IEICE Trans. Inf. Syst., 2021)

Technology Remapping Approach Using Multi-Gate Reconfigurable Cells for Post-Mask Functional ECO. - Tomohiro Nishiguchi; Nobutaka Kuroki; Masahiro Numa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024)