DEPOGIT: dense power-ground interconnect architecture for physical design integrity. - Atsushi Kurokawa; Nobuto Ono; Tetsuro Kage; Hiroo Masuda (ASP-DAC, 2004)

Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture. - Atsushi Kurokawa; Masaharu Yamamoto; Nobuto Ono; Tetsuro Kage; Yasuaki Inoue; Hiroo Masuda (ISQED, 2005)

On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design. - Takashi Sato 001; Junji Ichimiya; Nobuto Ono; Koutaro Hachiya; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Adaptive Porting of Analog IPs with Reusable Conservative Properties. - Takashi Nojima; Nobuto Ono; Shigetoshi Nakatake; Toru Fujimura; Koji Okazaki; Yoji Kajitani (ISVLSI, 2006)

On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature. - Takashi Sato 001; Junji Ichimiya; Nobuto Ono; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Proposal of Metrics for SSTA Accuracy Evaluation. - Hiroyuki Kobayashi; Nobuto Ono; Takashi Sato 001; Jiro Iwai; Hidenari Nakashima; Takaaki Okumura; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations. - Takaaki Okumura; Atsushi Kurokawa; Hiroo Masuda; Toshiki Kanamoto; Masanori Hashimoto; Hiroshi Takafuji; Hidenari Nakashima; Nobuto Ono; Tsuyoshi Sakata; Takashi Sato 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Long Battery Life IoT Sensing by Beat Sensors. - Koichiro Ishibashi; Ryohei Takitoge; Duangchak Manyvone; Nobuto Ono; Shigeya Yamaguchi (ICPS, 2019)

Operation and Stability Analysis of Temperature-Insensitive MOS Reference Current Source with Self-Bias Circuit. - Souma Yamamoto; Kuswan Isam Ebisawa; Yudai Abe; Takashi Ida; Yukiko Shibasaki; Nobukazu Tsukiji; Anna Kuwana; Haruo Kobayashi 001; Akira Suzuki; Yukichi Todoroki; Toshihiko Kakinoki; Nobuto Ono; et al. (ISOCC, 2020)

Unit cell mismatch scrambling method for high-resolution unary DAC based on virtual 3D layout. - Dan Yao; Xuanyan Bai; Shogo Katayama; Anna Kuwana; Kazuyuki Kawauchi; Haruo Kobayashi 001; Kouji Hirai; Akira Suzuki; Satoshi Yamada; Tomoyuki Kato; Ritsuko Kitakoga; Takeshi Shimamura; et al. (IEICE Electron. Express, 2022)