An Integrated Design Environment for Application Specific Integrated Processor. - Jun Sato; Masaharu Imai; Tetsuya Hakata; Alauddin Y. Alomary; Nobuyuki Hikichi (ICCD, 1991)

An integer programming approach to instruction implementation method selection problem. - Masaharu Imai; Jun Sato; Alauddin Alomary; Nobuyuki Hikichi (EURO-DAC, 1992)

PEAS-I: A hardware/software co-design system for ASIPs. - Alauddin Alomary; Takeharu Nakata; Yoshimichi Honma; Jun Sato; Nobuyuki Hikichi; Masaharu Imai (EURO-DAC, 1993)

An ASIP instruction set optimization algorithm with functional module sharing constraint. - Alauddin Alomary; Takeharu Nakata; Yoshimichi Honma; Masaharu Imai; Nobuyuki Hikichi (ICCAD, 1993)

A hardware/software codesign method for pipelined instruction set processor using adaptive database. - Nguyen-Ngoc Bình; Masaharu Imai; Akichika Shiomi; Nobuyuki Hikichi (ASP-DAC, 1995)

A hardware/software partitioning algorithm for pipelined instruction set processor. - Nguyen-Ngoc Bình; Masaharu Imai; Nobuyuki Hikichi (EURO-DAC, 1995)

A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts. - Nguyen-Ngoc Bình; Masaharu Imai; Akichika Shiomi; Nobuyuki Hikichi (DAC, 1996)

Cool System scalable 3-D stacked heterogeneous Multi-Core / Multi-Chip architecture for ultra low-power digital TV applications. - Yukoh Matsumoto; Tomoyuki Morimoto; Michiya Hagimoto; Hiroyuki Uchida; Nobuyuki Hikichi; Fumito Imura; Hiroshi Nakagawa; Masahiro Aoyagi (COOL Chips, 2012)