Accurate rise time and overshoots estimation in RLC interconnects. - Noha H. Mahmoud; Yehea I. Ismail (ISCAS (5), 2003)

Physical limitations on the bit-rate of on-chip interconnects. - Noha H. Mahmoud; Maged Ghoneima; Yehea I. Ismail (ACM Great Lakes Symposium on VLSI, 2005)

Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew. - Abinash Roy; Noha H. Mahmoud; Masud H. Chowdhury (DAC, 2007)

Delay and Clock Skew Variation due to Coupling Capacitance and Inductance. - Abinash Roy; Noha H. Mahmoud; Masud H. Chowdhury (ISCAS, 2007)