VLSI Implementation of a New Block Cipher. - Heinz Bonnenberg; Andreas Curiger; Norbert Felber; Hubert Kaeslin; Xuejia Lai (ICCD, 1991)

VINCI: Secure Test of a VLSI High-Speed Encryption System. - Heinz Bonnenberg; Andreas Curiger; Norbert Felber; Hubert Kaeslin; Reto Zimmermann; Wolfgang Fichtner (ITC, 1993)

A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm. - Reto Zimmermann; Andreas Curiger; Heinz Bonnenberg; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (IEEE J. Solid State Circuits, 1994)

An embedded stack microprocessor for SDH telecommunication applications. - Manfred Stadler; Markus Thalmann; Thomas Röwer; Norbert Felber; Wolfgang Fichtner (CICC, 1998)

Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor. - Manfred Stadler; Thomas Röwer; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner; Markus Thalmann (ITC, 1999)

A new paradigm for very flexible SONET/SDH IP-modules. - Thomas Roewer; Manfred Stadler; Markus Thalmann; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (CICC, 2000)

A 30-frames/s megapixel real-time CMOS image processor. - Daniel Doswald; Jürg Häfliger; Patrick Blessing; Norbert Felber; Peter Niederer; Wolfgang Fichtner (IEEE J. Solid State Circuits, 2000)

A new approach for controlling series-connected IGBT modules. - Jan Thalheim; Norbert Felber; Wolfgang Fichtner (ISCAS (3), 2001)

Design and Verification of a Stack Processor Virtual Component. - Manfred Stadler; Markus Thalmann; Thomas Röwer; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (IEEE Micro, 2001)

A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems. - Thomas Villiger; Stephan Oetiker; Frank K. Gürkaynak; Norbert Felber; Hubert Kaeslin; Wolfgang Fichtner (ASYNC, 2002)

A 50 Mbps 4×4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation. - Andreas Burg 001; Norbert Felber; Wolfgang Fichtner (ICECS, 2003)

Waveform coding for low-power digital filtering of speech data. - Jürgen Wassner; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (IEEE Trans. Signal Process., 2003)

VLSI implementation of the sphere decoding algorithm. - Andreas Burg 001; Markus Wenk; Martin Zellweger; Marc Simon Wegmueller; Norbert Felber; Wolfgang Fichtner (ESSCIRC, 2004)

Towards an AES crypto-chip resistant to differential power analysis. - Norbert Pramstaller; Frank K. Gürkaynak; Simon Haene; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (ESSCIRC, 2004)

A 2 Gb/s balanced AES crypto-chip implementation. - Frank K. Gürkaynak; Andreas Burg 001; Norbert Felber; Wolfgang Fichtner; D. Gasser; Franco Hug; Hubert Kaeslin (ACM Great Lakes Symposium on VLSI, 2004)

A 0.67-mm2 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids. - Flavio Carbognani; Felix Bürgin; Luca Henzen; Herbert Koch; Hovig Magdassian; Christoph Pedretti; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (ECCTD, 2005)

Improving DPA security by using globally-asynchronous locally-synchronous systems. - Frank K. Gürkaynak; Stephan Oetiker; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (ESSCIRC, 2005)

ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs. - David Perels; Simon Haene; Peter Luethi; Andreas Peter Burg; Norbert Felber; Wolfgang Fichtner; Helmut Bölcskei (ESSCIRC, 2005)

Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications. - Flavio Carbognani; Felix Bürgin; Norbert Felber; Hubert Kaeslin; Wolfgang Fichtner (PATMOS, 2005)

Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC. - Frank K. Gürkaynak; Stephan Oetiker; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (FMGALS@MEMOCODE, 2005)

GALS at ETH Zurich: Success or Failure. - Frank K. Gürkaynak; Stephan Oetiker; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (ASYNC, 2006)

Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. - Felix Bürgin; Flavio Carbognani; Martin Hediger; Hektor Meier; Robert Meyer-Piening; Rafael Santschi; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (DAC, 2006)

Two-phase resonant clocking for ultra-low-power hearing aid applications. - Flavio Carbognani; Felix Bürgin; Norbert Felber; Hubert Kaeslin; Wolfgang Fichtner (DATE, 2006)

A Frame-Start Detector for a 4×4 MIMO-OFDM System. - David Perels; Simon Haene; Andreas Burg 001; Peter Luethi; Norbert Felber; Wolfgang Fichtner (ICASSP (4), 2006)

Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems. - Andreas Burg 001; Simon Haene; David Perels; Peter Luethi; Norbert Felber; Wolfgang Fichtner (ISCAS, 2006)

42% power savings through glitch-reducing clocking strategy in a hearing aid application. - Flavio Carbognani; Felix Bürgin; Norbert Felber; Hubert Kaeslin; Wolfgang Fichtner (ISCAS, 2006)

Silicon implementation of an MMSE-based soft demapper for MIMO-BICM. - Simon Haene; Andreas Burg 001; David Perels; Peter Luethi; Norbert Felber; Wolfgang Fichtner (ISCAS, 2006)

K-best MIMO detection VLSI architectures achieving up to 424 Mbps. - Markus Wenk; Martin Zellweger; Andreas Burg 001; Norbert Felber; Wolfgang Fichtner (ISCAS, 2006)

Multi-gigabit GCM-AES Architecture Optimized for FPGAs. - Stefan Lemsitzer; Johannes Wolkerstorfer; Norbert Felber; Matthias Braendli (CHES, 2007)

A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication. - Flavio Carbognani; Simon Haene; Manuel Arrigo; Claudio Pagnamenta; Felix Bürgin; Norbert Felber; Hubert Kaeslin; Wolfgang Fichtner (CICC, 2007)

Reduced-complexity mimo detector with close-to ml error rate performance. - C. Hess; Markus Wenk; Andreas Burg 001; Peter Luethi; Christoph Studer; Norbert Felber; Wolfgang Fichtner (ACM Great Lakes Symposium on VLSI, 2007)

FFT Processor for OFDM Channel Estimation. - Simon Haene; Andreas Burg 001; Peter Luethi; Norbert Felber; Wolfgang Fichtner (ISCAS, 2007)

VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition. - Peter Luethi; Andreas Burg 001; Simon Haene; David Perels; Norbert Felber; Wolfgang Fichtner (ISCAS, 2007)

An Attempt to Model the Human Body as a Communication Channel. - Marc Simon Wegmueller; Andreas Kuhn 001; Juerg Froehlich; Michael Oberle; Norbert Felber; Niels Kuster; Wolfgang Fichtner (IEEE Trans. Biomed. Eng., 2007)

A hardware architecture for surface splatting. - Tim Weyrich; Simon Heinzle; Timo Aila; Daniel Bernhard Fasnacht; Stephan Oetiker; Mario Botsch; Cyril Flaig; Simon Mall; Kaspar Rohrer; Norbert Felber; Hubert Kaeslin; Markus H. Gross (ACM Trans. Graph., 2007)

Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison. - Peter Luethi; Christoph Studer; Sebastian Duetsch; Eugen Zgraggen; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (APCCAS, 2008)

A transform, lighting and setup ASIC for surface splatting. - Simon Heinzle; Olivier Saurer; Sebastian Axmann; Diego Browarnik; Andreas Schmidt; Flavio Carbognani; Peter Luethi; Norbert Felber; Markus H. Gross (ISCAS, 2008)

FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM. - Luca Henzen; Flavio Carbognani; Norbert Felber; Wolfgang Fichtner (SoC, 2008)

Multi-user MIMO testbed. - Peter Luethi; Markus Wenk; Thomas Koch; Wolfgang Fichtner; Michael Lerjen; Norbert Felber (WiNTECH, 2008)

ECC Is Ready for RFID - A Proof in Silicon. - Daniel M. Hein; Johannes Wolkerstorfer; Norbert Felber (Selected Areas in Cryptography, 2008)

Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers. - Flavio Carbognani; Felix Bürgin; Norbert Felber; Hubert Kaeslin; Wolfgang Fichtner (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT. - Luca Henzen; Flavio Carbognani; Norbert Felber; Wolfgang Fichtner (DATE, 2009)

Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. - Markus Wenk; Peter Luethi; Thomas Koch; Patrick Maechler; Norbert Felber; Wolfgang Fichtner; Michael Lerjen (ISCAS, 2009)

Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. - Markus Wenk; Peter Luethi; Thomas Koch; Patrick Maechler; Norbert Felber; Wolfgang Fichtner; Michael Lerjen (ISCAS, 2009)

Galvanic Coupling Enabling Wireless Implant Communications. - Marc Simon Wegmueller; Sonja Huclova; Juerg Froehlich; Michael Oberle; Norbert Felber; Niels Kuster; Wolfgang Fichtner (IEEE Trans. Instrum. Meas., 2009)

Matching pursuit: Evaluation and implementatio for LTE channel estimation. - Patrick Maechler; Pierre Greisen; Norbert Felber; Andreas Burg 001 (ISCAS, 2010)

Low-Resource Hardware Design of an Elliptic Curve Processor for Contactless Devices. - Erich Wenger; Martin Feldhofer; Norbert Felber (WISA, 2010)

Signal Transmission by Galvanic Coupling Through the Human Body. - Marc Simon Wegmueller; Michael Oberle; Norbert Felber; Niels Kuster; Wolfgang Fichtner (IEEE Trans. Instrum. Meas., 2010)

Random sampling ADC for sparse spectrum sensing. - Patrick Maechler; Norbert Felber; Andreas Peter Burg (EUSIPCO, 2011)

Sparsity-based real-time audio restoration. - Patrick Maechler; David E. Bellasi; Andreas Burg 001; Norbert Felber; Hubert Kaeslin; Christoph Studer (DASIP, 2012)

Compressive sensing for WiFi-based passive bistatic radar. - Patrick Maechler; Norbert Felber; Hubert Kaeslin (EUSIPCO, 2012)

Hardware-efficient random sampling of fourier-sparse signals. - Patrick Maechler; Norbert Felber; Hubert Kaeslin; Andreas Burg 001 (ISCAS, 2012)

100 Gbit/s authenticated encryption based on quantum key distribution. - Michael Muehlberghuber; Christoph Keller; Norbert Felber; Christian Pendl (VLSI-SoC, 2012)

FPGA-Based High-Speed Authenticated Encryption System. - Michael Muehlberghuber; Christoph Keller; Frank K. Gürkaynak; Norbert Felber (VLSI-SoC (Selected Papers), 2012)

VLSI Design of Approximate Message Passing for Signal Restoration and Compressive Sensing. - Patrick Maechler; Christoph Studer; David E. Bellasi; Arian Maleki; Andreas Burg 001; Norbert Felber; Hubert Kaeslin; Richard G. Baraniuk (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

A Security-Enhanced UHF RFID Tag Chip. - Johann Ertl; Thomas Plos; Martin Feldhofer; Norbert Felber; Luca Henzen (DSD, 2013)

Live demonstration: Real-time audio restoration using sparse signal recovery. - David E. Bellasi; Patrick Maechler; Andreas Burg 001; Norbert Felber; Hubert Kaeslin; Christoph Studer (ISCAS, 2013)

Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers. - Christoph Keller; Frank K. Gürkaynak; Hubert Kaeslin; Norbert Felber (ISCAS, 2014)

Low-power multichannel spectro-temporal feature extraction circuit for audio pattern wake-up. - Dinko Oletic; Vedran Bilas; Michele Magno; Norbert Felber; Luca Benini (DATE, 2016)