Statische und dynamische CMOS-Schaltungstechniken im Vergleich. - Norbert Wehn; Manfred Glesner (it Inf. Technol., 1986)

The ALGIC Silicon Compiler System: Implementation, Design Experience and Results. - Johannes Schuck; Norbert Wehn; Manfred Glesner; G. Kamp (DAC, 1987)

A Defect-Tolerant and Fully Testable PLA. - Norbert Wehn; Manfred Glesner; K. Caesar; P. Mann; A. Roth (DAC, 1988)

Effiziente Verfahren für den physikalischen Entwurf von MOS-VLSI-Schaltungen und ihre Anwendung beim Entwurf eines defekttoleranten Mikroprozessors. - Norbert Wehn (1989)

Timing Driven Partitioning of Combinational Logic. - Norbert Wehn; Manfred Glesner; A. Kister; S. Kastner (Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1990)

HADES-high-level architecture development and exploration system. - Peter Poechmueller; Michael Held; Norbert Wehn; Manfred Glesner (Great Lakes Symposium on VLSI, 1991)

A new approach to timing driven partitioning of combinational logic. - Norbert Wehn; Manfred Glesner (Great Lakes Symposium on VLSI, 1991)

RAMSES-a rapid prototyping environment for embedded control applications. - Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (RSP, 1991)

Verifikation mikroelektronischer Systeme zur Prozeßsteuerung durch schnelle Prototypenrealisierung. - Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (ASIM, 1991)

A VLSI System Design for the Control of High Performance Combustion Engines. - Andreas Laudenbach; Manfred Glesner; Norbert Wehn (VLSI, 1991)

A New Approach to Multiplexer Minimisation in the CALLAS Synthesis Environment. - Norbert Wehn; Jörg Biesenack; Michael Pilsl (VLSI, 1991)

High-level synthesis in a rapid-prototype environment for mechatronic systems. - Norbert Wehn; Hans-Jürgen Herpel; Thomas Hollstein; Peter Poechmueller; Manfred Glesner (EURO-DAC, 1992)

Data Part Optimizations in the CALLAS Synthesis Environment. - Jörg Biesenack; Norbert Wehn; A. Stoll; Michael Payer (Synthesis for Control Dominated Circuits, 1992)

Synthesis of complex VHDL operators. - Michael Gasteier; Norbert Wehn; Manfred Glesner (EURO-DAC, 1993)

Estimating lower hardware bounds in high-level synthesis. - Norbert Wehn; Manfred Glesner; C. Vielhauer (VLSI, 1993)

The Siemens high-level synthesis system CALLAS. - Jörg Biesenack; Michael Koster; Anton Langmaier; Stephane Ledeux; Sabine März; Michael Payer; Michael Pilsl; Steffen Rumler; Holger Soukup; Norbert Wehn; Peter Duzy (IEEE Trans. Very Large Scale Integr. Syst., 1993)

Scheduling of behavioral VHDL by retiming techniques. - Norbert Wehn; Jörg Biesenack; Peter Duzy; T. Langmaier; Michael Münch; Michael Pilsl; Steffen Rumler (EURO-DAC, 1994)

Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization. - Bernd Wurth; Norbert Wehn (EDAC-ETC-EUROASIC, 1994)

The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis. - Régis Leveugle; Zahava Koren; Israel Koren; Gabriele Saucier; Norbert Wehn (IEEE Trans. Computers, 1994)

Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. - U. Zahm; Thomas Hollstein; Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (FPL, 1995)

An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions. - Michael Münch; Manfred Glesner; Norbert Wehn (ISSS, 1996)

Embedded DRAM Architectural Trade-Offs. - Norbert Wehn; Søren Hein (DATE, 1998)

Issues in Embedded DRAM Development and Applications. - Doris Keitel-Schulz; Norbert Wehn (ISSS, 1998)

Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. - Michael Münch; Norbert Wehn; Bernd Wurth; Renu Mehra; Jim Sproch (DATE, 2000)

Turbo-decoding without SNR estimation. - Alexander Worm; Peter A. Hoeher; Norbert Wehn (IEEE Commun. Lett., 2000)

Low power implementation of a turbo-decoder on programmable architectures. - Frank Gilbert; Alexander Worm; Norbert Wehn (ASP-DAC, 2001)

Design of low-power high-speed maximum a priori decoder architectures. - Alexander Worm; Holger Lamm; Norbert Wehn (DATE, 2001)

Embedded Memories in System Design: Technology, Application, Design and Tools. - Doris Keitel-Schulz; Norbert Wehn; Francky Catthoor; Preeti Ranjan Panda (VLSI Design, 2001)

Vlsi Architectures For High-Speed Map Decoders. - Alexander Worm; Holger Lamm; Norbert Wehn (VLSI Design, 2001)

Embedded DRAM Development: Technology, Physical Design, and Application Issues. - Doris Keitel-Schulz; Norbert Wehn (IEEE Des. Test Comput., 2001)

Turbo-decoder quantization for UMTS. - Heiko Michel; Norbert Wehn (IEEE Commun. Lett., 2001)

Hardware/Software Trade-Offs for Advanced 3G Channel Coding. - Heiko Michel; Alexander Worm; Norbert Wehn; Michael Münch (DATE, 2002)

Evaluation of algorithm optimizations for low-power Turbo-Decoder implementations. - Michael J. Thul; Timo Vogt; Frank Gilbert; Norbert Wehn (ICASSP, 2002)

Optimized concurrent interleaving architecture for high-throughput turbo-decoding. - Michael J. Thul; Frank Gilbert; Norbert Wehn (ICECS, 2002)

Enabling high-speed turbo-decoding through concurrent interleaving. - Michael J. Thul; Norbert Wehn; L. P. Rao (ISCAS (1), 2002)

Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications. - Gerd Kreiselmaier; Timo Vogt; Norbert Wehn; Friedbert Berens (SBCCI, 2002)

Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors . - Frank Gilbert; Michael J. Thul; Norbert Wehn (DATE, 2003)

VLSI-implementation issues of turbo trellis-coded modulation. - Frank Kienle; Gerd Kreiselmaier; Norbert Wehn (ICASSP (2), 2003)

Concurrent interleaving architectures for high-throughput channel coding. - Michael J. Thul; Frank Gilbert; Norbert Wehn (ICASSP (2), 2003)

Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders. - Frank Gilbert; Norbert Wehn (PATMOS, 2003)

System-on-Chip - Ein Sonderheft anlässlich des 60. Geburtstages von Prof. Dr. Dr. h.c. mult. Manfred Glesner. - Norbert Wehn (it Inf. Technol., 2003)

Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung (Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding). - Norbert Wehn (it Inf. Technol., 2003)

Design methodology for IRA codes. - Frank Kienle; Norbert Wehn (ASP-DAC, 2004)

Channel Decoder Architecture for 3G Mobile Wireless Terminals. - Friedbert Berens; Gerd Kreiselmaier; Norbert Wehn (DATE, 2004)

Joint graph-decoder design of IRA codes on scalable architectures [LDPC codes]. - Frank Kienle; Norbert Wehn (ICASSP (4), 2004)

Energy- and Area-Efficient Deinterleaving Architecture for High-Throughput Wireless Applications. - Armin Wellig; Julien Zory; Norbert Wehn (PATMOS, 2004)

FPGA implementation of parallel turbo-decoders. - Michael J. Thul; Norbert Wehn (SBCCI, 2004)

A multi-standard channel-decoder for base-station applications. - Timo Vogt; Norbert Wehn; Philippe Alves (SBCCI, 2004)

Power Optimization in advanced Channel Coding. - Norbert Wehn (Power-aware Computing Systems, 2005)

A Synthesizable IP Core for DVB-S2 LDPC Code Decoding. - Frank Kienle; Torben Brack; Norbert Wehn (DATE, 2005)

Energieminimierung von Basisbandsignalverarbeitungsalgorithmen auf programmierbaren Plattformen. - Christian Neeb; Norbert Wehn (GI Jahrestagung (1), 2005)

Network-on-chip-centric approach to interleaving in high throughput channel decoders. - Christian Neeb; Michael J. Thul; Norbert Wehn (ISCAS (2), 2005)

Architecture-driven voltage scaling for high-throughput turbo-decoders. - Frank Gilbert; Timo Vogt; Norbert Wehn (J. Embed. Comput., 2005)

A Scalable System Architecture for High-Throughput Turbo-Decoders. - Michael J. Thul; Frank Gilbert; Timo Vogt; Gerd Kreiselmaier; Norbert Wehn (J. VLSI Signal Process., 2005)

A Reconfigurable Outer Modem Platform for Future Communications Systems. - Norbert Wehn; Timo Vogt; Christian Neeb (Dynamically Reconfigurable Architectures, 2006)

Disclosing the LDPC code decoder design space. - Torben Brack; Frank Kienle; Norbert Wehn (DATE, 2006)

Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip. - Christian Neeb; Norbert Wehn (DSD, 2006)

Advanced Channel Decoding Algorithms and Their Implementation for Future Communication Systems. - Norbert Wehn (ISVLSI, 2006)

A Synthesizable IP Core for WIMAX 802.16E LDPC Code Decoding. - Torben Brack; Matthias Alles; Frank Kienle; Norbert Wehn (PIMRC, 2006)

A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding. - Timo Vogt; Christian Neeb; Norbert Wehn (ReCoSoC, 2006)

A Reconfigurable Applcation Specific Instruction Set Processor for Viterbi and Log-MAP Decoding. - Timo Vogt; Norbert Wehn (SiPS, 2006)

Fast convergence algorithm for LDPC Codes. - Frank Kienle; Timo Lehnigk-Emden; Norbert Wehn (VTC Spring, 2006)

Low complexity LDPC code decoders for next generation standards. - Torben Brack; Matthias Alles; Timo Lehnigk-Emden; Frank Kienle; Norbert Wehn; Nicola E. L'Insalata; Francesco Rossi; Massimo Rovini; Luca Fanucci (DATE, 2007)

Evaluation of High Throughput Turbo-Decoder Architectures. - Matthias May 001; Christian Neeb; Norbert Wehn (ISCAS, 2007)

XEEMU: An Improved XScale Power Simulator. - Zoltán Herczeg; Ákos Kiss 001; Daniel Schmidt 001; Norbert Wehn; Tibor Gyimóthy (PATMOS, 2007)

Implementation Issues of Turbo Synchronization with Duo-Binary Turbo Decoding. - Matthias Alles; Timo Lehnigk-Emden; Uwe Wasenmüller; Norbert Wehn (PIMRC, 2007)

A Reliability-Aware LDPC Code Decoding Algorithm. - Matthias Alles; Torben Brack; Norbert Wehn (VTC Spring, 2007)

A Survey on LDPC Codes and Decoders for OFDM-based UWB Systems. - Torben Brack; Matthias Alles; Timo Lehnigk-Emden; Frank Kienle; Norbert Wehn; Friedbert Berens; Andreas Ruegg (VTC Spring, 2007)

Cognitive Radio Prototyping. - Peter Jung 002; Alexander Vießmann; Christoph Spiegel 001; Admir Burnic; Zijian Bai; Guido Horst Bruck; Konstantin Statnikov; Andreas Waadt; Shangbo Wang; Xavier Popon; Rafael Rodriguez Velilla; Harri Saarnisaari; et al. (CrownCom, 2008)

A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. - Matthias May 001; Matthias Alles; Norbert Wehn (DATE, 2008)

A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment. - Timo Vogt; Norbert Wehn (DATE, 2008)

Super-regenerative UWB impulse detector with synchronized quenching mechanism. - Muhammad Anis; Reinhard Tielert; Norbert Wehn (ESSCIRC, 2008)

Application-specific reconfigurable processors. - Heiko Hinkelmann; Peter Zipf; Manfred Glesner; Matthias Alles; Timo Vogt; Norbert Wehn; Götz Kappen; Tobias G. Noll (FPL, 2008)

3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique. - Muhammad Anis; Reinhard Tielert; Norbert Wehn (ISCAS, 2008)

Fully integrated self-quenched super-regenerative UWB impulse detector. - Muhammad Anis; Reinhard Tielert; Norbert Wehn (ISWPC, 2008)

Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. - Sacha Loitz; Markus Wedler; Christian Brehm; Timo Vogt; Norbert Wehn; Wolfgang Kunz (SASP, 2008)

Macro Interleaver Design for Bit Interleaved Coded Modulation with Low-Density Parity-Check Codes. - Frank Kienle; Norbert Wehn (VTC Spring, 2008)

A Reconfigurable ASIP for Convolutional and Turbo Decoding in an SDR Environment. - Timo Vogt; Norbert Wehn (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Error correction in single-hop wireless sensor networks - A case study. - Daniel Schmidt 001; Matthias Berning; Norbert Wehn (DATE, 2009)

A novel LDPC decoder for DVB-S2 IP. - Stefan Müller 004; Manuel Schreger; Marten Kabutz; Matthias Alles; Frank Kienle; Norbert Wehn (DATE, 2009)

Valid inequalities for binary linear codes. - Stefan Ruzika; Akin Tanatmis; Frank Kienle; Horst W. Hamacher; Norbert Wehn; Mayur Punekar (ISIT, 2009)

DRAM power management and energy consumption: a critical assessment. - Daniel Schmidt 001; Norbert Wehn (SBCCI, 2009)

Energy simulation of embedded XScale systems with XEEMU. - Zoltán Herczeg; Daniel Schmidt 001; Ákos Kiss 001; Norbert Wehn; Tibor Gyimóthy (J. Embed. Comput., 2009)

FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems. - Matthias Alles; Timo Vogt; Christian Brehm; Norbert Wehn (Dynamically Reconfigurable Systems, 2010)

A 150Mbit/s 3GPP LTE Turbo code decoder. - Matthias May 001; Thomas Ilnseher; Norbert Wehn; Wolfgang Raab (DATE, 2010)

A rapid prototyping system for error-resilient multi-processor systems-on-chip. - Matthias May 001; Norbert Wehn; Abdelmajid Bouajila; Johannes Zeppenfeld; Walter Stechele; Andreas Herkersdorf; Daniel Ziener; Jürgen Teich (DATE, 2010)

RF spectrum sensing technique for cognitive UWB radio network. - Muhammad Anis; Maurits Ortmanns; Norbert Wehn (ESSCIRC, 2010)

Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. - Sacha Loitz; Markus Wedler; Dominik Stoffel; Christian Brehm; Norbert Wehn; Wolfgang Kunz (FDL, 2010)

Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices. - Muhammad Anis; Maurits Ortmanns; Norbert Wehn (ISCAS, 2010)

A 477mW NoC-based digital baseband for MIMO 4G SDR. - Fabien Clermidy; Christian Bernard; Romain Lemaire; Jérôme Martin; Ivan Miro Panades; Yvain Thonnart; Pascal Vivet; Norbert Wehn (ISSCC, 2010)

AmICA - A Flexible, Compact, Easy-to-Program and Low-Power WSN Platform. - Sebastian Wille; Norbert Wehn; Ivan Martinovic; Simon Kunz; Peter Göhner (MobiQuitous, 2010)

Low-complexity iteration control for MIMO-BICM systems. - Christina Gimmler; Timo Lehnigk-Emden; Norbert Wehn (PIMRC, 2010)

A New Hardware Efficient Inversion Based Random Number Generator for Non-uniform Distributions. - Christian de Schryver; Daniel Schmidt 001; Norbert Wehn; Elke Korn; Henning Marxen; Ralf Korn (ReConFig, 2010)

Implementation comparisons of the QR decomposition for MIMO detection. - Gabriel Luca Nazar; Christina Gimmler; Norbert Wehn (SBCCI, 2010)

A separation algorithm for improved LP-decoding of linear block codes. - Akin Tanatmis; Stefan Ruzika; Horst W. Hamacher; Mayur Punekar; Frank Kienle; Norbert Wehn (IEEE Trans. Inf. Theory, 2010)

Reliability: A Cross-Disciplinary and Cross-Layer Approach. - Norbert Wehn (Asian Test Symposium, 2011)

Design and architectures for dependable embedded systems. - Jörg Henkel; Lars Bauer; Joachim Becker; Oliver Bringmann 001; Uwe Brinkschulte; Samarjit Chakraborty; Michael Engel; Rolf Ernst; Hermann Härtig; Lars Hedrich; Andreas Herkersdorf; Rüdiger Kapitza; et al. (CODES+ISSS, 2011)

Design space exploration for 3D-stacked DRAMs. - Christian Weis; Norbert Wehn; Igor Loi; Luca Benini (DATE, 2011)

Bringing C++ productivity to VHDL world: From language definition to a case study. - Ivan Shcherbakov; Christian Weis; Norbert Wehn (FDL, 2011)

A scalable multi-ASIP architecture for standard compliant trellis decoding. - Christian Brehm; Thomas Ilnseher; Norbert Wehn (ISOCC, 2011)

Energy Efficient Acceleration and Evaluation of Financial Computations towards Real-Time Pricing. - Christian de Schryver; Matthias Jung 001; Norbert Wehn; Henning Marxen; Anton Kostiuk; Ralf Korn (KES (4), 2011)

An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model. - Christian de Schryver; Ivan Shcherbakov; Frank Kienle; Norbert Wehn; Henning Marxen; Anton Kostiuk; Ralf Korn (ReConFig, 2011)

Validation of channel decoding ASIPs a case study. - Christian Brehm; Norbert Wehn; Sacha Loitz; Wolfgang Kunz (International Symposium on Rapid System Prototyping, 2011)

Algorithmic complexity in the heston model: an implementation view. - Henning Marxen; Anton Kostiuk; Ralf Korn; Christian de Schryver; Stephan Wurm; Ivan Shcherbakov; Norbert Wehn (WHPCF@SC, 2011)

A monolithic LTE interleaver generator for highly parallel SMAP decoders. - Thomas Ilnseher; Matthias May 001; Norbert Wehn (WTS, 2011)

On Complexity, Energy- and Implementation-Efficiency of Channel Decoders. - Frank Kienle; Norbert Wehn; Heinrich Meyr (IEEE Trans. Commun., 2011)

A Case Study on Error Resilient Architectures for Wireless Communication. - Christian Brehm; Matthias May 001; Christina Gimmler; Norbert Wehn (ARCS, 2012)

DRAM selection and configuration for real-time mobile systems. - Manil Dev Gomony; Christian Weis; Benny Akesson; Norbert Wehn; Kees Goossens (DATE, 2012)

An energy efficient DRAM subsystem for 3D integrated SoCs. - Christian Weis; Igor Loi; Luca Benini; Norbert Wehn (DATE, 2012)

A Parallel Adaptive Range Coding Compressor: Algorithm, FPGA Prototype, Evaluation. - Ivan Shcherbakov; Norbert Wehn (DCC, 2012)

Dependable embedded systems: The German research foundation DFG priority program SPP 1500. - Jörg Henkel; Oliver Bringmann 001; Andreas Herkersdorf; Wolfgang Rosenstiel; Norbert Wehn (ETS, 2012)

Combining robotic frameworks with a smart environment framework: MCA2/SimVis3D and TinySEP. - Michael Arndt; Karsten Berns; Sebastian Wille; Norbert Wehn; Luiza de Souza (UbiComp, 2012)

ASIC design of a Gbit/s LDPC decoder for iterative MIMO systems. - Christina Gimmler; Frank Kienle; Christian Weis; Norbert Wehn; Matthias Alles (ICNC, 2012)

A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm. - Ivan Shcherbakov; Christian Weis; Norbert Wehn (IPDPS Workshops, 2012)

A 2.15GBit/s turbo code decoder for LTE advanced base station applications. - Thomas Ilnseher; Frank Kienle; Christian Weis; Norbert Wehn (ISTC, 2012)

FPGA-based rapid prototyping platform for MIMO-BICM design space exploration. - Christina Gimmler-Dumont; Philipp Schläfer; Norbert Wehn (ReConFig, 2012)

Reliability study on system memories of an iterative MIMO-BICM system. - Christina Gimmler-Dumont; Christian Brehm; Norbert Wehn (VLSI-SoC, 2012)

A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision. - Christian de Schryver; Daniel Schmidt 001; Norbert Wehn; Elke Korn; Henning Marxen; Anton Kostiuk; Ralf Korn (Int. J. Reconfigurable Comput., 2012)

Design Space of Flexible Multigigabit LDPC Decoders. - Philipp Schläfer; Christian Weis; Norbert Wehn; Matthias Alles (VLSI Design, 2012)

Hardware implementations of Gaussian elimination over GF(2) for channel decoding algorithms. - Stefan Scholl; Christopher Stumm; Norbert Wehn (AFRICON, 2013)

Code-aided synchronization with QPSK, 8-PSK and 16-QAM modulations. - Imran Ali; Uwe Wasenmüller; Norbert Wehn (APCC, 2013)

Towards variation-aware system-level power estimation of DRAMs: an empirical approach. - Karthik Chandrasekar 001; Christian Weis; Benny Akesson; Norbert Wehn; Kees Goossens (DAC, 2013)

Reliable on-chip systems in the nano-era: lessons learnt and future trends. - Jörg Henkel; Lars Bauer; Nikil D. Dutt; Puneet Gupta 001; Sani R. Nassif; Muhammad Shafique 001; Mehdi Baradaran Tahoori; Norbert Wehn (DAC, 2013)

System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. - Karthik Chandrasekar 001; Christian Weis; Benny Akesson; Norbert Wehn; Kees Goossens (DATE, 2013)

A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model. - Christian de Schryver; Pedro Torruella; Norbert Wehn (DATE, 2013)

Energy and performance exploration of accelerator coherency port using Xilinx ZYNQ. - MohammadSadegh Sadri; Christian Weis; Norbert Wehn; Luca Benini (FPGAworld, 2013)

Activity recognition and nutrition monitoring in every day situations with a textile capacitive neckband. - Jingyuan Cheng; Bo Zhou 005; Kai Kunze; Carl Christian Rheinländer; Sebastian Wille; Norbert Wehn; Jens Weppner; Paul Lukowicz (UbiComp (Adjunct Publication), 2013)

ASIC implementation of a modified QR decomposition for tree search based MIMO detection. - Christina Gimmler-Dumont; Philipp Schläfer; Norbert Wehn (LASCAS, 2013)

TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. - Matthias Jung 001; Christian Weis; Norbert Wehn; Karthik Chandrasekar 001 (RAPIDO, 2013)

Loopy - An open-source TCP/IP rapid prototyping and validation framework. - Christian de Schryver; Philipp Schläfer; Norbert Wehn; Thomas Fischer 003; Arnd Poetzsch-Heffter (ReConFig, 2013)

A new dimension of parallelism in ultra high throughput LDPC decoding. - Philipp Schläfer; Norbert Wehn; Matthias Alles; Timo Lehnigk-Emden (SiPS, 2013)

Cross-Layer Error Resilience and Its Application to Wireless Communication Systems. - Christina Gimmler-Dumont; Matthias May 001; Norbert Wehn (J. Low Power Electron., 2013)

A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. - Veit Kleeberger; Christina Gimmler-Dumont; Christian Weis; Andreas Herkersdorf; Daniel Mueller-Gritschneder; Sani R. Nassif; Ulf Schlichtmann; Norbert Wehn (IEEE Micro, 2013)

Performance evaluation of ambient services by combining robotic frameworks and a smart environment platform. - Michael Arndt; Sebastian Wille; Luiza de Souza; Vítor Fortes Rey; Norbert Wehn; Karsten Berns (Robotics Auton. Syst., 2013)

Exploration and Optimization of 3-D Integrated DRAM Subsystems. - Christian Weis; Igor Loi; Luca Benini; Norbert Wehn (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Mixed precision multilevel Monte Carlo on hybrid computing systems. - Christian Brugger; Christian de Schryver; Norbert Wehn; Steffen Omland; Mario Hefter; Klaus Ritter 001; Anton Kostiuk; Ralf Korn (CIFEr, 2014)

Feedforward carrier synchronization for pilotless bursts of DVB-RCS2. - Imran Ali; Uwe Wasenmüller; Norbert Wehn (CSNDSP, 2014)

Exploiting expendable process-margins in DRAMs for run-time performance optimization. - Karthik Chandrasekar 001; Sven Goossens; Christian Weis; Martijn Koedam; Benny Akesson; Norbert Wehn; Kees Goossens (DATE, 2014)

Technology transfer towards Horizon 2020. - Rainer Leupers; Norbert Wehn; Marco Roodzant; Johannes Stahl 004; Luca Fanucci; Albert Cohen 001; Bernd Janson (DATE, 2014)

Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. - MohammadSadegh Sadri; Matthias Jung 001; Christian Weis; Norbert Wehn; Luca Benini (DATE, 2014)

Connecting different worlds - Technology abstraction for reliability-aware design and Test. - Ulf Schlichtmann; Veit Kleeberger; Jacob A. Abraham; Adrian Evans; Christina Gimmler-Dumont; Michael Glaß; Andreas Herkersdorf; Sani R. Nassif; Norbert Wehn (DATE, 2014)

Hardware implementation of a Reed-Solomon soft decoder based on information set decoding. - Stefan Scholl; Norbert Wehn (DATE, 2014)

A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems. - Victor Tomashevich; Christina Gimmler-Dumont; Christian Fesl; Norbert Wehn; Ilia Polian (DDECS, 2014)

HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model. - Christian Brugger; Christian de Schryver; Norbert Wehn (FPL, 2014)

Monitoring household activities and user location with a cheap, unobtrusive thermal sensor array. - Peter Hevesi; Sebastian Wille; Gerald Pirkl; Norbert Wehn; Paul Lukowicz (UbiComp, 2014)

A Wearable Inertial Sensor Unit for Jump Diagnosis in Multiple Athletes. - Marcus Schmidt; Thomas Jaitner; Kevin Nolte; Carl Rheinländer; Sebastian Wille; Norbert Wehn (icSPORTS, 2014)

Advanced hardware architecture for soft decoding Reed-Solomon codes. - Stefan Scholl; Norbert Wehn (ISTC, 2014)

A simplex algorithm for LP decoding hardware. - Florian Gensheimer; Stefan Ruzika; Stefan Scholl; Norbert Wehn (PIMRC, 2014)

A systematic methodology for analyzing closed-form Heston pricer regarding their accuracy and runtime. - Christian Brugger; Gongda Liu; Christian de Schryver; Norbert Wehn (WHPCF@SC, 2014)

Optimized active and power-down mode refresh control in 3D-DRAMs. - Matthias Jung 001; Christian Weis; Norbert Wehn; MohammadSadegh Sadri; Luca Benini (VLSI-SoC, 2014)

Reliability analysis of MIMO channel preprocessing by fault injection. - Victor Tomashevich; Christina Gimmler-Dumont; Norbert Wehn; Ilia Polian (WiSEE, 2014)

Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. - Andreas Herkersdorf; Hananeh Aliee; Michael Engel; Michael Glaß; Christina Gimmler-Dumont; Jörg Henkel; Veit Kleeberger; Michael A. Kochte; Johannes Maximilian Kühn; Daniel Mueller-Gritschneder; Sani R. Nassif; Holm Rauchfuss; et al. (Microelectron. Reliab., 2014)

A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless Receivers. - Christina Gimmler-Dumont; Norbert Wehn (ACM Trans. Embed. Comput. Syst., 2014)

Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model. - Christian Brugger; André Lucas Chinazzo; Alexandre Flores John; Christian de Schryver; Norbert Wehn; Andreas Spitz; Katharina Anna Zweig (ASONAM, 2015)

Reverse longstaff-schwartz american option pricing on hybrid CPU/FPGA systems. - Christian Brugger; Javier Alejandro Varela; Norbert Wehn; Songyin Tang; Ralf Korn (DATE, 2015)

Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. - Christian Weis; Matthias Jung 001; Peter Ehses; Cristiano Santos; Pascal Vivet; Sven Goossens; Martijn Koedam; Norbert Wehn (DATE, 2015)

Syndrome based check node processing of high order NB-LDPC decoders. - Philipp Schläfer; Norbert Wehn; Matthias Alles; Timo Lehnigk-Emden; Emmanuel Boutillon (ICT, 2015)

A Custom Computing System for Finding Similarties in Complex Networks. - Christian Brugger; Valentin Grigorovici; Matthias Jung 001; Christian Weis; Christian de Schryver; Katharina Anna Zweig; Norbert Wehn (ISVLSI, 2015)

Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. - Christian Weis; Matthias Jung 001; Omar Naji; Norbert Wehn; Cristiano Santos; Pascal Vivet; Andreas Hansson 001 (ISVLSI, 2015)

Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. - Matthias Jung 001; Éder Zulian; Deepak M. Mathew; Matthias Herrmann; Christian Brugger; Christian Weis; Norbert Wehn (MEMSYS, 2015)

A new architecture for high throughput, low latency NB-LDPC check node processing. - Philipp Schläfer; Vladimir Rybalkin; Norbert Wehn; Matthias Alles; Timo Lehnigk-Emden; Emmanuel Boutillon (PIMRC, 2015)

Latency reduction for LTE/LTE-A turbo-code decoders by on-the-fly calculation of CRC. - Stefan Weithoffer; Norbert Wehn (PIMRC, 2015)

Exploiting the brownian bridge technique to improve longstaff-schwartz american option pricing on FPGA systems. - Javier Alejandro Varela; Christian Brugger; Christian de Schryver; Norbert Wehn; Songyin Tang; Steffen Omland (ReConFig, 2015)

A high-level DRAM timing, power and area exploration tool. - Omar Naji; Christian Weis; Matthias Jung 001; Norbert Wehn; Andreas Hansson 001 (SAMOS, 2015)

Optimization strategies for portable code for Monte Carlo-based value-at-risk systems. - Javier Alejandro Varela; Claus Kestel; Christian de Schryver; Norbert Wehn; Sascha Desmettre; Ralf Korn (WHPCF@SC, 2015)

DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. - Matthias Jung 001; Christian Weis; Norbert Wehn (IPSJ Trans. Syst. LSI Des. Methodol., 2015)

Application-aware cross-layer reliability analysis and optimization. - Michael Glaß; Hananeh Aliee; Liang Chen 014; Mojtaba Ebrahimi; Faramarz Khosravi; Veit B. Kleeberger; Alexandra Listl; Daniel Müller-Gritschneder; Fabian Oboril; Ulf Schlichtmann; Mehdi Baradaran Tahoori; Jürgen Teich; et al. (it Inf. Technol., 2015)

Efficient reliability management in SoCs - an approximate DRAM perspective. - Matthias Jung 001; Deepak M. Mathew; Christian Weis; Norbert Wehn (ASP-DAC, 2016)

Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. - Matthias Jung 001; Deepak M. Mathew; Christian Weis; Norbert Wehn (DAC, 2016)

Error resilience and energy efficiency: An LDPC decoder design study. - Philipp Schläfer; Chu-Hsiang Huang; Clayton Schoeny; Christian Weis; Yao Li 007; Norbert Wehn; Lara Dolecek (DATE, 2016)

Saturated min-sum decoding: An "afterburner" for LDPC decoder hardware. - Stefan Scholl; Philipp Schläfer; Norbert Wehn (DATE, 2016)

IMU-based determination of fatigue during long sprint. - Marcus Schmidt; Carl Christian Rheinländer; Sebastian Wille; Norbert Wehn; Thomas Jaitner (UbiComp Adjunct, 2016)

Precise synchronization time stamp generation for Bluetooth low energy. - Carl Christian Rheinländer; Norbert Wehn (IEEE SENSORS, 2016)

ADMM versus simplex algorithm for LP decoding. - Florian Gensheimer; Stefan Ruzika; Stefan Scholl; Norbert Wehn (ISTC, 2016)

Advanced iterative channel coding schemes: When Shannon meets Moore. - Stefan Scholl; Stefan Weithoffer; Norbert Wehn (ISTC, 2016)

On the applicability of trellis compression to Turbo-Code decoder hardware architectures. - Stefan Weithoffer; Frederic Pohl; Norbert Wehn (ISTC, 2016)

ConGen: An Application Specific DRAM Memory Controller Generator. - Matthias Jung 001; Deepak M. Mathew; Christian Weis; Norbert Wehn; Irene Heinrich; Marco V. Natale; Sven O. Krumke (MEMSYS, 2016)

Reverse Engineering of DRAMs: Row Hammer with Crosshair. - Matthias Jung 001; Carl Christian Rheinländer; Christian Weis; Norbert Wehn (MEMSYS, 2016)

A new bank sensitive DRAMPower model for efficient design space exploration. - Matthias Jung 001; Deepak M. Mathew; Éder F. Zulian; Christian Weis; Norbert Wehn (PATMOS, 2016)

Exploring system performance using elastic traces: Fast, accurate and portable. - Radhika Jagtap; Stephan Diestelhorst; Andreas Hansson 001; Matthias Jung 001; Norbert Wehn (SAMOS, 2016)

A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256). - Vladimir Rybalkin; Philipp Schläfer; Norbert Wehn (VTC Spring, 2016)

Precision-tuning and hybrid pricer for closed-form solution-based Heston calibration. - Christian Brugger; Gongda Liu; Christian de Schryver; Norbert Wehn (Concurr. Comput. Pract. Exp., 2016)

A cross layer approach for efficient thermal management in 3D stacked SoCs. - Matthias Jung 001; Christian Weis; Norbert Wehn (Microelectron. Reliab., 2016)

Increasing sampling efficiency for the fixed degree sequence model with phase transitions. - Christian Brugger; André Lucas Chinazzo; Alexandre Flores John; Christian de Schryver; Norbert Wehn; Wolfgang Eugen Schlauch; Katharina Anna Zweig (Soc. Netw. Anal. Min., 2016)

Bit-level pipelining for highly parallel turbo-code decoders: A critical assessment. - Stefan Weithoffer; Kira Kraft; Norbert Wehn (AFRICON, 2017)

A Wearable Flexible Sensor Network Platform for the Analysis of Different Sport Movements. - Marcus Schmidt; Sebastian Wille; Carl Rheinländer; Norbert Wehn; Thomas Jaitner (AHFE (24), 2017)

A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. - Sebastian Haas; Tobias Seifert; Benedikt Nöthen; Stefan Scholze; Sebastian Höppner; Andreas Dixius; Esther Pérez Adeva; Thomas R. Augustin; Friedrich Pauls; Sadia Moriam; Mattis Hasler; Erik Fischer; et al. (DAC, 2017)

Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition. - Vladimir Rybalkin; Norbert Wehn; Mohammad Reza Yousefi; Didier Stricker (DATE, 2017)

An advanced embedded architecture for connected component analysis in industrial applications. - Menbere Tekleyohannes; MohammadSadegh Sadri; Christian Weis; Norbert Wehn; Martin Klein 005; Michael Siegrist (DATE, 2017)

Enhanced decoding for high-rate LTE Turbo-Codes with short block lengths. - Stefan Weithoffer; Norbert Wehn (ICC Workshops, 2017)

Exploiting Decoupled OpenCL Work-Items with Data Dependencies on FPGAs: A Case Study. - Javier Alejandro Varela; Norbert Wehn; Qian Liang; Songyin Tang (IPDPS Workshops, 2017)

Near Real-Time Risk Simulation of Complex Portfolios on Heterogeneous Computing Systems with OpenCL. - Javier Alejandro Varela; Norbert Wehn (IWOCL, 2017)

Integrating DRAM power-down modes in gem5 and quantifying their impact. - Radhika Jagtap; Matthias Jung 001; Wendy Elsasser; Christian Weis; Andreas Hansson 001; Norbert Wehn (MEMSYS, 2017)

Using run-time reverse-engineering to optimize DRAM refresh. - Deepak M. Mathew; Éder F. Zulian; Matthias Jung 001; Kira Kraft; Christian Weis; Bruce L. Jacob; Norbert Wehn (MEMSYS, 2017)

A Bank-Wise DRAM Power Model for System Simulations. - Deepak M. Mathew; Éder F. Zulian; Subash Kannoth; Matthias Jung 001; Christian Weis; Norbert Wehn (RAPIDO, 2017)

A new state model for DRAMs using Petri Nets. - Matthias Jung 001; Kira Kraft; Norbert Wehn (SAMOS, 2017)

Supervised testing of concurrent software in embedded systems. - Jasmin Jahic; Thomas Kuhn 001; Matthias Jung 001; Norbert Wehn (SAMOS, 2017)

System simulation with gem5 and SystemC: The keystone for full interoperability. - Christian Menard; Jerónimo Castrillón; Matthias Jung 001; Norbert Wehn (SAMOS, 2017)

TensorQuant: A Simulation Toolbox for Deep Neural Network Quantization. - Dominik Marek Loroch; Franz-Josef Pfreundt; Norbert Wehn; Janis Keuper (MLHPC@SC, 2017)

Real-Time Financial Risk Measurement of Dynamic Complex Portfolios with Python and PyOpenCL. - Javier Alejandro Varela; Norbert Wehn; Sascha Desmettre; Ralf Korn (PyHPC@SC, 2017)

Advanced wireless digital baseband signal processing beyond 100 Gbit/s. - Stefan Weithoffer; Matthias Herrmann; Claus Kestel; Norbert Wehn (SiPS, 2017)

The memory challenge in computing systems: A survey. - Norbert Wehn (SoCC, 2017)

A Platform to Analyze DDR3 DRAM's Power and Retention Time. - Matthias Jung 001; Deepak M. Mathew; Carl Christian Rheinländer; Christian Weis; Norbert Wehn (IEEE Des. Test, 2017)

3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. - Pei Liu 003; Ahmed Hemani; Kolin Paul; Christian Weis; Matthias Jung 001; Norbert Wehn (Int. J. Parallel Program., 2017)

DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. - Christian Weis; Abdul Mutaal; Omar Naji; Matthias Jung 001; Andreas Hansson 001; Norbert Wehn (Int. J. Parallel Program., 2017)

A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. - Pei Liu 003; Ahmed Hemani; Kolin Paul; Christian Weis; Matthias Jung 001; Norbert Wehn (J. Signal Process. Syst., 2017)

Improving the error behavior of DRAM by exploiting its Z-channel property. - Kira Kraft; Chirag Sudarshan; Deepak M. Mathew; Christian Weis; Norbert Wehn; Matthias Jung 001 (DATE, 2018)

The transprecision computing paradigm: Concept, design, and applications. - A. Cristiano I. Malossi; Michael Schaffner; Anca Molnos; Luca Gammaitoni; Giuseppe Tagliavini; Andrew P. J. Emerson; Andrés Tomás; Dimitrios S. Nikolopoulos; Eric Flamand; Norbert Wehn (DATE, 2018)

An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. - Deepak M. Mathew; Martin Schultheis; Carl Christian Rheinländer; Chirag Sudarshan; Christian Weis; Norbert Wehn; Matthias Jung 001 (DATE, 2018)

iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization. - Vladimir Rybalkin; Syed Saqib Bukhari; Muhammad Mohsin Ghaffar; Aqib Ghafoor; Norbert Wehn; Andreas Dengel 001 (DocEng, 2018)

FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. - Vladimir Rybalkin; Alessandro Pappalardo; Muhammad Mohsin Ghaffar; Giulio Gambardella; Norbert Wehn; Michaela Blott (FPL, 2018)

Improved Maximum-Likelihood Decoding Using Sparse Parity-Check Matrices. - Florian Gensheimer; Tobias Dietz; Stefan Ruzika; Kira Kraft; Norbert Wehn (ICT, 2018)

A Reconfigurable Accelerator for Morphological Operations. - Menbere Kina Tekleyohannes; Christian Weis; Norbert Wehn; Martin Klein 005; Michael Siegrist (IPDPS Workshops, 2018)

The Role of Memories in Transprecision Computing. - Christian Weis; Matthias Jung 001; Éder F. Zulian; Chirag Sudarshan; Deepak M. Mathew; Norbert Wehn (ISCAS, 2018)

A Low-Complexity Projection Algorithm for ADMM-Based LP Decoding. - Florian Gensheimer; Tobias Dietz; Stefan Ruzika; Kira Kraft; Norbert Wehn (ISTC, 2018)

When Channel Coding Hits the Implementation Wall. - Claus Kestel; Matthias Herrmann; Norbert Wehn (ISTC, 2018)

25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s. - Stefan Weithoffer; Charbel Abdel Nour; Norbert Wehn; Catherine Douillard; Claude Berrou (ISTC, 2018)

Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. - Matthias Jung 001; Sally A. McKee; Chirag Sudarshan; Christoph Dropmann; Christian Weis; Norbert Wehn (MEMSYS, 2018)

Efficient coding scheme for DDR4 memory subsystems. - Kira Kraft; Deepak M. Mathew; Chirag Sudarshan; Matthias Jung 001; Christian Weis; Norbert Wehn; Florian Longnos (MEMSYS, 2018)

Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. - Dominik Marek Loroch; Franz-Josef Pfreundt; Norbert Wehn; Janis Keuper (DMLE/IOTSTREAMING@PKDD/ECML, 2018)

A Framework for Non-intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration. - Jasmin Jahic; Matthias Jung 001; Thomas Kuhn 001; Claus Kestel; Norbert Wehn (RV, 2018)

BOSMI: a framework for non-intrusive monitoring and testing of embedded multithreaded software on the logical level. - Jasmin Jahic; Thomas Kuhn 001; Matthias Jung 001; Norbert Wehn (SAMOS, 2018)

A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. - Christian Brugger; Valentin Grigorovici; Matthias Jung 001; Christian de Schryver; Christian Weis; Norbert Wehn; Katharina Anna Zweig (IEEE Des. Test, 2018)

Low-Latency CRC Calculation in Turbo-Code Decoding. - Stefan Weithoffer; Norbert Wehn (Int. J. Wirel. Inf. Networks, 2018)

Speculative Temporal Decoupling Using fork(). - Matthias Jung 001; Frank Schnicke; Markus Damm; Thomas Kuhn 001; Norbert Wehn (DATE, 2019)

Polar Code Decoder Framework. - Timo Lehnigk-Emden; Matthias Alles; Claus Kestel; Norbert Wehn (DATE, 2019)

Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling. - Jasmin Jahic; Varun Kumar; Matthias Jung 001; Gerhard Wirrer; Norbert Wehn; Thomas Kuhn 001 (ICPP Workshops, 2019)

An In-DRAM Neural Network Processing Engine. - Chirag Sudarshan; Jan Lappas; Muhammad Mohsin Ghaffar; Vladimir Rybalkin; Christian Weis; Matthias Jung 001; Norbert Wehn (ISCAS, 2019)

Fast validation of DRAM protocols with timed petri nets. - Matthias Jung 001; Kira Kraft; Taha Soliman; Chirag Sudarshan; Christian Weis; Norbert Wehn (MEMSYS, 2019)

Adaptive Transient Computing for Power-Neutral Embedded Devices. - Carl Christian Rheinländer; Norbert Wehn (PATMOS, 2019)

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction. - Menbere Kina Tekleyohannes; Vladimir Rybalkin; Muhammad Mohsin Ghaffar; Norbert Wehn; Andreas Dengel 001 (ReConFig, 2019)

Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. - Sven Müelich; Sebastian Bitzer; Chirag Sudarshan; Christian Weis; Norbert Wehn; Martin Bossert; Robert F. H. Fischer (REDUNDANCY, 2019)

RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. - Deepak M. Mathew; André Lucas Chinazzo; Christian Weis; Matthias Jung 001; Bastien Giraud; Pascal Vivet; Alexandre Levisse; Norbert Wehn (SAMOS, 2019)

A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. - Chirag Sudarshan; Jan Lappas; Christian Weis; Deepak M. Mathew; Matthias Jung 001; Norbert Wehn (SAMOS, 2019)

Wednesday Keynote: The Memory Wall: Challenges and Solutions. - Norbert Wehn (SoCC, 2019)

eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. - Dimitrios Stathis 001; Chirag Sudarshan; Yu Yang; Matthias Jung 001; Syed Mohammad Asad Hassan Jafri; Christian Weis; Ahmed Hemani; Anders Lansner; Norbert Wehn (CoRR, 2019)

Efficient FeFET Crossbar Accelerator for Binary Neural Networks. - Taha Soliman; Ricardo Olivo; Tobias Kirchner; Cecilia De la Parra; Maximilian Lederer; Thomas Kämpfe; Andre Guntoro; Norbert Wehn (ASAP, 2020)

Analysis and Optimization of TLS-based Security Mechanisms for Low Power IoT Systems. - Frederik Lauer; Carl Christian Rheinländer; Claus Kestel; Norbert Wehn (CCGRID, 2020)

Fast and Accurate DRAM Simulation: Can we Further Accelerate it? - Johannes Feldmann; Kira Kraft; Lukas Steiner; Norbert Wehn; Matthias Jung 001 (DATE, 2020)

TLS-Level Security for Low Power Industrial IoT Network Infrastructures. - Jochen Mades; Gerd Ebelt; Boris Janjic; Frederik Lauer; Carl Christian Rheinländer; Norbert Wehn (DATE, 2020)

When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. - Vladimir Rybalkin; Norbert Wehn (FPGA, 2020)

Fully Pipelined Iteration Unrolled Decoders the Road to TB/S Turbo Decoding. - Stefan Weithoffer; Rami Klaimi; Charbel Abdel Nour; Norbert Wehn; Catherine Douillard (ICASSP, 2020)

Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead. - Éder F. Zulian; Christian Weis; Norbert Wehn (ISCAS, 2020)

A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. - Muhammad Mohsin Ghaffar; Chirag Sudarshan; Christian Weis; Matthias Jung 001; Norbert Wehn (MEMSYS, 2020)

An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. - Deepak M. Mathew; Felipe S. Prado; Éder F. Zulian; Christian Weis; Muhammad Mohsin Ghaffar; Matthias Jung 001; Norbert Wehn (MEMSYS, 2020)

Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. - Sven Müelich; Chirag Sudarshan; Christian Weis; Martin Bossert; Robert F. H. Fischer; Norbert Wehn (MEMSYS, 2020)

Efficient Generation of Application Specific Memory Controllers. - Marco V. Natale; Matthias Jung 001; Kira Kraft; Frederik Lauer; Johannes Feldmann; Chirag Sudarshan; Christian Weis; Sven Oliver Krumke; Norbert Wehn (MEMSYS, 2020)

A 506Gbit/s Polar Successive Cancellation List Decoder with CRC. - Claus Kestel; Lucas Johannsen; Oliver Griebel; Jhon Jimenez; Timo Vogt; Timo Lehnigk-Emden; Norbert Wehn (PIMRC, 2020)

Low-complexity Computational Units for the Local-SOVA Decoding Algorithm. - Stefan Weithoffer; Rami Klaimi; Charbel Abdel Nour; Norbert Wehn; Catherine Douillard (PIMRC, 2020)

System simulation with PULP virtual platform and SystemC. - Éder F. Zulian; Germain Haugou; Christian Weis; Matthias Jung 001; Norbert Wehn (RAPIDO, 2020)

FERA: A Framework for Critical Assessment of Execution Monitoring Based Approaches for Finding Concurrency Bugs. - Jasmin Jahic; Thomas Bauer 002; Thomas Kuhn 001; Norbert Wehn; Pablo Oliveira Antonino (SAI (1), 2020)

DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. - Lukas Steiner; Matthias Jung 001; Felipe S. Prado; Kirill Bykov; Norbert Wehn (SAMOS, 2020)

A Ferroelectric FET Based In-memory Architecture for Multi-Precision Neural Networks. - Taha Soliman; Ricardo Olivo; Tobias Kirchner; Maximilian Lederer; Thomas Kämpfe; Andre Guntoro; Norbert Wehn (SoCC, 2020)

Advanced Hardware Architectures for Turbo Code Decoding Beyond 100 Gb/s. - Stefan Weithoffer; Oliver Griebel; Rami Klaimi; Charbel Abdel Nour; Norbert Wehn (WCNC, 2020)

The gem5 Simulator: Version 20.0+. - Jason Lowe-Power; Abdul Mutaal Ahmad; Ayaz Akram; Mohammad Alian; Rico Amslinger; Matteo Andreozzi; Adrià Armejach; Nils Asmussen; Srikant Bharadwaj; Gabe Black; Gedare Bloom; Bobby R. Bruce; et al. (CoRR, 2020)

Harvester-aware transient computing: Utilizing the mechanical inertia of kinetic energy harvesters for a proactive frequency-based power loss detection. - Carl Christian Rheinländer; Norbert Wehn (Integr., 2020)

Real-Time Energy Efficient Hand Pose Estimation: A Case Study. - Mhd Rashed Al Koutayni; Vladimir Rybalkin; Jameel Malik; Ahmed Elhayek; Christian Weis; Gerd Reis; Norbert Wehn; Didier Stricker (Sensors, 2020)

A Reduced-Complexity Projection Algorithm for ADMM-Based LP Decoding. - Florian Gensheimer; Tobias Dietz; Kira Kraft; Stefan Ruzika; Norbert Wehn (IEEE Trans. Inf. Theory, 2020)

Efficient Hardware Architectures for 1D- and MD-LSTM Networks. - Vladimir Rybalkin; Chirag Sudarshan; Christian Weis; Jan Lappas; Norbert Wehn; Li Cheng (J. Signal Process. Syst., 2020)

eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. - Dimitrios Stathis 001; Chirag Sudarshan; Yu Yang; Matthias Jung 001; Christian Weis; Ahmed Hemani; Anders Lansner; Norbert Wehn (J. Signal Process. Syst., 2020)

Adaptable Approximation Based on Bit Decomposition for Deep Neural Network Accelerators. - Taha Soliman; Cecilia De la Parra; Andre Guntoro; Norbert Wehn (AICAS, 2021)

A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. - Chirag Sudarshan; Taha Soliman; Cecilia De la Parra; Christian Weis; Leonardo Ecco; Matthias Jung 001; Norbert Wehn; Andre Guntoro (ASP-DAC, 2021)

The Dynamic Random Access Memory Challenge in Embedded Computing Systems. - Matthias Jung 001; Christian Weis; Norbert Wehn (A Journey of Embedded and Cyber-Physical Systems, 2021)

Burnt Forest Estimation from Sentinel-2 Imagery of Australia using Unsupervised Deep Learning. - Nosheen Abid; Muhammad Imran Malik; Muhammad Shahzad 002; Faisal Shafait; Haider Ali; Muhammad Mohsin Ghaffar; Christian Weis; Norbert Wehn; Marcus Liwicki (DICTA, 2021)

QuantYOLO: A High-Throughput and Power-Efficient Object Detection Network for Resource and Power Constrained UAVs. - Muhammad Gohar Javed; Minahil Raza; Muhammad Mohsin Ghaffar; Christian Weis; Norbert Wehn; Muhammad Shahzad 002; Faisal Shafait (DICTA, 2021)

A 336 Gbit/s Full-Parallel Window Decoder for Spatially Coupled LDPC Codes. - Matthias Herrmann; Norbert Wehn; Max Thalmaier; Markus Fehrenz; Timo Lehnigk-Emden; Matthias Alles (EuCNC/6G Summit, 2021)

HALF: Holistic Auto Machine Learning for FPGAs. - Jonas Ney; Dominik Marek Loroch; Vladimir Rybalkin; Nico Weber; Jens Krüger 004; Norbert Wehn (FPL, 2021)

ADMM-Based ML Decoding: from Theory to Practice. - Kira Kraft; Norbert Wehn (ICASSP, 2021)

On the Energy Costs of Post-Quantum KEMs in TLS-based Low-Power Secure IoT. - Maximilian Schöffel; Frederik Lauer; Carl Christian Rheinländer; Norbert Wehn (IoTDI, 2021)

Exploiting Resiliency for Kernel-Wise CNN Approximation Enabled by Adaptive Hardware Design. - Cecilia De la Parra; Ahmed El-Yamany; Taha Soliman; Akash Kumar 001; Norbert Wehn; Andre Guntoro (ISCAS, 2021)

Energy Efficient FEC Decoders. - Matthias Herrmann; Claus Kestel; Norbert Wehn (ISTC, 2021)

Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes. - Mojtaba Mahdavi 001; Liang Liu 002; Ove Edfors; Michael Lentmaier; Norbert Wehn; Stefan Weithoffer (ISTC, 2021)

Forward-Error-Correction for Beyond-5G Ultra-High Throughput Communications. - Norbert Wehn; Onur Sahin; Matthias Herrmann (ISTC, 2021)

Exploration of DDR5 with the Open-Source Simulator DRAMSys. - Lukas Steiner; Matthias Jung 001; Norbert Wehn (MBMV, 2021)

An LPDDR4 Safety Model for Automotive Applications. - Lukas Steiner; Kira Kraft; Denis Uecker; Matthias Jung 001; Michael Huonker; Norbert Wehn (MEMSYS, 2021)

Online Working Set Change Detection with Constant Complexity: The Cornerstone for Memory Management Algorithms in Scalable Systems. - L. J. Gokul Vasan; Éder F. Zulian; Christian Weis; Matthias Jung 001; Norbert Wehn (MEMSYS, 2021)

Embedded Face Recognition for Personalized Services in the Assistive Robotics. - Iris Walter; Jonas Ney; Tim Hotfilter; Vladimir Rybalkin; Julian Höfer; Norbert Wehn; Jürgen Becker 001 (PKDD/ECML Workshops (1), 2021)

Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling. - Deepak M. Mathew; Hammam Kattan; Christian Weis; Jörg Henkel; Norbert Wehn; Hussam Amrouch (IEEE Access, 2021)

iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing. - Menbere Kina Tekleyohannes; Vladimir Rybalkin; Muhammad Mohsin Ghaffar; Javier Alejandro Varela; Norbert Wehn; Andreas Dengel 001 (Int. J. Parallel Program., 2021)

iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing. - Menbere Kina Tekleyohannes; Vladimir Rybalkin; Muhammad Mohsin Ghaffar; Javier Alejandro Varela; Norbert Wehn; Andreas Dengel 001 (J. Imaging, 2021)

A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. - Chirag Sudarshan; Lukas Steiner; Matthias Jung 001; Jan Lappas; Christian Weis; Norbert Wehn (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. - Vladimir Rybalkin; Chirag Sudarshan; Christian Weis; Jan Lappas; Norbert Wehn; Li Cheng (J. Signal Process. Syst., 2021)

Increasing the Sampling Efficiency for the Link Assessment Problem. - André Lucas Chinazzo; Christian de Schryver; Katharina A. Zweig; Norbert Wehn (Algorithms for Big Data, 2022)

A Custom Hardware Architecture for the Link Assessment Problem. - André Lucas Chinazzo; Christian de Schryver; Katharina A. Zweig; Norbert Wehn (Algorithms for Big Data, 2022)

Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. - Jan Lappas; André Lucas Chinazzo; Christian Weis; Chenyang Xia; Zhihang Wu; Leibin Ni; Norbert Wehn (DATE, 2022)

Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. - Zhe Zhang; Jan Lappas; André Lucas Chinazzo; Christian Weis; Zhihang Wu; Leibin Ni; Norbert Wehn; Mehdi B. Tahoori (ETS, 2022)

Artificial Neural Networks-Based Radar Remote Sensing to Estimate Geographical Information during Oil-Spills. - Bilal Hammoud; Charbel Bou-Mosleh; Jonas Ney; Norbert Wehn (EUSIPCO, 2022)

FPGA-based Trainable Autoencoder for Communication Systems. - Jonas Ney; Sebastian Dörner; Matthias Herrmann; Mohammad Hassani Sadi; Jannis Clausius; Stephan ten Brink; Norbert Wehn (FPGA, 2022)

Blind and Channel-agnostic Equalization Using Adversarial Networks. - Vincent Lauinger; Manuel Hoffmann; Jonas Ney; Norbert Wehn; Laurent Schmalen (GLOBECOM, 2022)

Smart Teaching Materials with Real-Time Augmented Reality Support for Introductory Physics Education. - Hamraz Javaheri; Frederik Lauer; Luisa Lauer; Kristin Altmeyer; Roland Brünken; Markus Peschel; Norbert Wehn; Paul Lukowicz (UbiComp/ISWC Adjunct, 2022)

Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. - André Lucas Chinazzo; Jan Lappas; Christian Weis; Qinhui Huang; Zhihang Wu; Leibin Ni; Norbert Wehn (ICECS 2022, 2022)

Exploration of Thermoelectric Energy Harvesting for Secure, TLS-Based Industrial IoT Nodes. - Frederik Lauer; Maximilian Schöffel; Carl Christian Rheinländer; Norbert Wehn (ICIOT, 2022)

A Maximum A-Posteriori Probabilistic Approach using UAV-Nadir-Looking Wide-Band Radar for Remote Sensing Oil-Spill Detection. - Bilal Hammoud; Norbert Wehn (IGARSS, 2022)

A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation. - Jonas Ney; Bilal Hammoud; Norbert Wehn (IPDPS Workshops, 2022)

Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. - Chirag Sudarshan; Mohammad Hassani Sadi; Christian Weis; Norbert Wehn (ISCAS, 2022)

Unveiling the Real Performance of LPDDR5 Memories. - Lukas Steiner; Matthias Jung 001; Michael Huonker; Norbert Wehn (MEMSYS, 2022)

A Framework for Formal Verification of DRAM Controllers. - Lukas Steiner; Chirag Sudarshan; Matthias Jung 001; Dominik Stoffel; Norbert Wehn (MEMSYS, 2022)

A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. - Chirag Sudarshan; Mohammad Hassani Sadi; Lukas Steiner; Christian Weis; Norbert Wehn (SAMOS, 2022)

Towards More Secure PUF Applications: A Low-Area Polar Decoder Implementation. - Claus Kestel; Christoph Frisch; Michael Pehl; Norbert Wehn (SOCC, 2022)

Efficient Hardware Approximation for Bit-Decomposition Based Deep Neural Network Accelerators. - Taha Soliman; Amro Eldebiky; Cecilia De la Parra; Andre Guntoro; Norbert Wehn (SOCC, 2022)

Finite-Alphabet Message Passing using only Integer Operations for Highly Parallel LDPC Decoders. - Tobias Monsees; Dirk Wübben; Armin Dekorsy; Oliver Griebel; Matthias Herrmann; Norbert Wehn (SPAWC, 2022)

FeFET versus DRAM based PIM Architectures: A Comparative Study. - Chirag Sudarshan; Taha Soliman; Thomas Kämpfe; Christian Weis; Norbert Wehn (VLSI-SoC, 2022)

Code-based Cryptography in IoT: A HW/SW Co-Design of HQC. - Maximilian Schöffel; Johannes Feldmann; Norbert Wehn (WF-IoT, 2022)

Beyond 100 Gbit/s Pipeline Decoders for Spatially Coupled LDPC Codes. - Matthias Herrmann; Norbert Wehn (EURASIP J. Wirel. Commun. Netw., 2022)

Minimum-Integer Computation Finite Alphabet Message Passing Decoder: From Theory to Decoder Implementations towards 1 Tb/s. - Tobias Monsees; Oliver Griebel; Matthias Herrmann; Dirk Wübben; Armin Dekorsy; Norbert Wehn (Entropy, 2022)

A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. - Chirag Sudarshan; Taha Soliman; Jan Lappas; Christian Weis; Mohammad Hassani Sadi; Matthias Jung 001; Andre Guntoro; Norbert Wehn (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

DRAMSys4.0: An Open-Source Simulation Framework for In-depth DRAM Analyses. - Lukas Steiner; Matthias Jung 001; Felipe S. Prado; Kirill Bykov; Norbert Wehn (Int. J. Parallel Program., 2022)

Increasing Throughput of In-Memory DNN Accelerators by Flexible Layerwise DNN Approximation. - Cecilia De la Parra; Taha Soliman; Andre Guntoro; Akash Kumar 001; Norbert Wehn (IEEE Micro, 2022)

Multidimensional Minimum Euclidean Distance Approach Using Radar Reflectivities for Oil Slick Thickness Estimation. - Bilal Hammoud; Georges Daou; Norbert Wehn (Sensors, 2022)

Smart Sensors for Augmented Electrical Experiments. - Sebastian Kapp; Frederik Lauer; Fabian Beil; Carl Christian Rheinländer; Norbert Wehn; Jochen Kuhn (Sensors, 2022)

Secure IoT in the Era of Quantum Computers - Where Are the Bottlenecks? - Maximilian Schöffel; Frederik Lauer; Carl Rheinländer; Norbert Wehn (Sensors, 2022)

Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs. - Mojtaba Mahdavi 001; Stefan Weithoffer; Matthias Herrmann; Liang Liu 002; Ove Edfors; Norbert Wehn; Michael Lentmaier (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. - Vladimir Rybalkin; Jonas Ney; Menbere Kina Tekleyohannes; Norbert Wehn (ACM Trans. Reconfigurable Technol. Syst., 2022)

FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration. - Taha Soliman; Nellie Laleni; Tobias Kirchner; Franz Müller 001; Ashish Shrivastava; Thomas Kämpfe; Andre Guntoro; Norbert Wehn (ACM Trans. Embed. Comput. Syst., 2022)

ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. - Gia Bao Thieu; Sven Gesper; Guillermo Payá-Vayá; Christoph Riggers; Oliver Renke; Till Fiedler; Jakob Marten; Tobias Stuckenberg; Holger Blume; Christian Weis; Lukas Steiner; Chirag Sudarshan; et al. (DATE, 2023)

Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation. - Jonas Ney; Vincent Lauinger; Laurent Schmalen; Norbert Wehn (EuCNC/6G Summit, 2023)

Automatic DRAM Subsystem Configuration with irace. - Lukas Steiner; Gustavo Delazeri; Iron Prando da Silva; Matthias Jung 001; Norbert Wehn (DroneSE/RAPIDO@HiPEAC, 2023)

Torwards Variability Immune Scalable FeFET-based Macros for IMC DNN Accelerators. - Nellie Laleni; Taha Soliman; Cecilia De la Parra; Franz Müller 001; Tobias Kirchner; Andre Guntoro; Thomas Kämpfe; Norbert Wehn; T. Jang (ICECS, 2023)

Oil Spill Detection in Calm Ocean Conditions: A U-Net Model Novel Solution. - Bilal Hammoud; Charbel Bou-Mosleh; Mohamed Moursi; Norbert Wehn (IGARSS, 2023)

A Novel Iterative Estimation Technique Using Radar Sensing to Remotely Characterize Oil Slicks During Spills. - Bilal Hammoud; Norbert Wehn (IGARSS, 2023)

A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. - Z. Zhang; Zhihang Wu; Christian Weis; Norbert Wehn; Mehdi Baradaran Tahoori (IOLTS, 2023)

Energy-Efficient Decoding of Spatially Coupled Low-Density Parity-Check Codes using Adaptive Window Sizes. - Oliver Griebel; Matthias Herrmann; Bilal Hammoud; Norbert Wehn (ISTC, 2023)

Successive Cancellation Automorphism List Decoding of Polar Codes. - Lucas Johannsen; Claus Kestel; Marvin Geiselhart; Timo Vogt; Stephan ten Brink; Norbert Wehn (ISTC, 2023)

A Precise Measurement Platform for LPDDR4 Memories. - Johannes Feldmann; Lukas Steiner; Derek Christ; Thomas Psota; Matthias Jung 001; Norbert Wehn (MEMSYS, 2023)

From Algorithm to Implementation: Enabling High-Throughput CNN-Based Equalization on FPGA for Optical Communications. - Jonas Ney; Christoph Füllner; Vincent Lauinger; Laurent Schmalen; Sebastian Randel; Norbert Wehn (SAMOS, 2023)

Automorphism Ensemble Polar Code Decoders for 6G URLLC. - Claus Kestel; Marvin Geiselhart; Lucas Johannsen; Stephan ten Brink; Norbert Wehn (CoRR, 2023)

Efficient Hardware Implementation of Constant Time Sampling for HQC. - Maximilian Schöffel; Johannes Feldmann; Norbert Wehn (CoRR, 2023)

The NWRD Dataset: An Open-Source Annotated Segmentation Dataset of Diseased Wheat Crop. - Hirra Anwar; Saad Ullah Khan 005; Muhammad Mohsin Ghaffar; Muhammad Fayyaz; Muhammad Jawad Khan; Christian Weis; Norbert Wehn; Faisal Shafait (Sensors, 2023)

Channel Coding Under Silicon Implementation Constraints. - Oliver Griebel; Lucas Johannsen; Claus Kestel; Matthias Herrmann; Norbert Wehn (IEEECONF, 2024)

Timing Analysis beyond Complementary CMOS Logic Styles. - Jan Lappas; Mohamed Amine Riahi; Christian Weis; Norbert Wehn; Sani R. Nassif (ASPDAC, 2024)

A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication. - Lukas Steiner; Timo Lehnigk-Emden; Markus Fehrenz; Norbert Wehn (DATE, 2024)

Achieving High Throughput with a Trainable Neural-Network-Based Equalizer for Communications on FPGA. - Jonas Ney; Norbert Wehn (DSD, 2024)

Error Detection and Correction Codes for Safe In-Memory Computations. - Luca Parrini; Taha Soliman; Benjamin Hettwer; Jan Micha Borrmann; Simranjeet Singh; Ankit Bende; Vikas Rana; Farhad Merchant; Norbert Wehn (ETS, 2024)

FPGA Onboard Processing of Tiny-ML Models Using Radar-Sensing for Oil Spill Monitoring. - Bilal Hammoud; Jonas Ney; Charbel Bou-Mosleh; Norbert Wehn (IGARSS, 2024)

Radar Backscattering Sensitivity to Emulsions Using Spectral Analysis from Nadir-Aerial Response Systems. - Bilal Hammoud; Norbert Wehn (IGARSS, 2024)

Do Radiation and Aging Impact DVFS? TCAD-based Analysis on 22 nm FDSOI Latches. - Zhe Zhang; Christian Weis; Norbert Wehn; Mehdi B. Tahoori; Sani R. Nassif (IOLTS, 2024)

Enabling cell selection optimization for non-traditional CMOS topologies. - André Lucas Chinazzo; Norbert Wehn; Sani R. Nassif (ISOCC, 2024)

Timing Analysis with Analytical Sensitivity. - Jan Lappas; Norbert Wehn; Sani R. Nassif (ISOCC, 2024)

Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects. - Zhe Zhang; Mahta Mayahinia; Christian Weis; Norbert Wehn; Mehdi B. Tahoori; Sani R. Nassif; Grigor Tshagharyan; Gurgen Harutyunyan; Yervant Zorian (ITC, 2024)

PIMSys: A Virtual Prototype for Processing in Memory. - Derek Christ; Lukas Steiner; Matthias Jung 001; Norbert Wehn (MEMSYS, 2024)

A 5 Gb/s Low-Power Receiver with a Novel Data Sampling Method for LPDDR Interfaces. - Mohammadreza Esmaeilpour; Jan Lappas; Hussien Abdo; Christian Weis; Norbert Wehn (NewCAS, 2024)

A 10 Gb/s Low-Power Single-Ended Linear Equalizer for DRAM Interfaces. - Mohammadreza Esmaeilpour; Jan Lappas; Christian Weis; Norbert Wehn (NorCAS, 2024)

Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks. - Vincent Lauinger; Patrick Matalla; Jonas Ney; Norbert Wehn; Sebastian Randel; Laurent Schmalen (OFC, 2024)

A Novel System Simulation Framework for HBM2 FPGA Platforms. - Hector Gerardo Muñoz Hernandez; Veronia Iskandar; Lukas Steiner; Philipp Holzinger; Matthias Jung 001; Diana Göhringer; Michael Hübner 001; Norbert Wehn; Marc Reichenbach (SAMOS, 2024)

A Low-Power Linear Phase Interpolation-Based Delay Line in 12nm FinFET Technology. - Mohammadreza Esmaeilpour; Jan Lappas; Christian Weis; Norbert Wehn (VLSI-SoC, 2024)

Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management. - Zhe Zhang; Mahta Mayahinia; Christian Weis; Norbert Wehn; Mehdi B. Tahoori; Sani R. Nassif; Grigor Tshagharyan; Gurgen Harutyunyan; Yervant Zorian (VTS, 2024)

Variational Quantum Linear Solver Enhanced Quantum Support Vector Machine. - Jianming Yi; Kalyani Suresh; Ali Moghiseh; Norbert Wehn (Adv. Artif. Intell. Mach. Learn., 2024)

Adaptive Sliding Window Decoding of Spatially Coupled Low-Density Parity-Check Codes: Algorithms and Energy Efficient Implementations. - Oliver Griebel; Bilal Hammoud; Norbert Wehn (IEEE Access, 2024)

Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications. - Jonas Ney; Patrick Matalla; Vincent Lauinger; Laurent Schmalen; Sebastian Randel; Norbert Wehn (CoRR, 2024)

CNN-Based Equalization for Communications: Achieving Gigabit Throughput with a Flexible FPGA Hardware Architecture. - Jonas Ney; Christoph Füllner; Vincent Lauinger; Laurent Schmalen; Sebastian Randel; Norbert Wehn (CoRR, 2024)

Novel adaptive quantization methodology for 8-bit floating-point DNN training. - Mohammad Hassani Sadi; Chirag Sudarshan; Norbert Wehn (Des. Autom. Embed. Syst., 2024)

High-Throughput Polar Code Decoders with Information Bottleneck Quantization. - Claus Kestel; Lucas Johannsen; Norbert Wehn (Entropy, 2024)

Trends in Channel Coding for 6G. - Sisi Miao; Claus Kestel; Lucas Johannsen; Marvin Geiselhart; Laurent Schmalen; Alexios Balatsoukas-Stimming; Gianluigi Liva; Norbert Wehn; Stephan ten Brink (Proc. IEEE, 2024)

Multi-Partner Project: Sustainable Textile Electronics (STELEC). - Bo Zhou 005; Mengxi Liu 004; Sizhen Bian; Daniel Geißler; Paul Lukowicz; José Miranda; Jonathan Dan; David Atienza; Mohamed Amine Riahi; Norbert Wehn; Russel N. Torah; Sheng Yong; et al. (DATE, 2025)

Improving Chip Design Enablement for Universities in Europe - A Position Paper. - Lukas Krupp; Ian O'Connor; Luca Benini; Christoph Studer; Joachim Rodrigues; Norbert Wehn (DATE, 2025)

Multi-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage). - Mehdi B. Tahoori; Jürgen Becker 001; Jörg Henkel; Wolfgang Kunz; Ulf Schlichtmann; Georg Sigl; Jürgen Teich; Norbert Wehn (DATE, 2025)

Design of a Low-Power 4.3 Gb/s Transceiver Using Pre-computed Lookup Tables. - Hussien Abdo; Jan Lappas; Mohammadreza Esmaeilpour; Christian Weis; Norbert Wehn (DDECS, 2025)

Analysis and Mitigation of Radiation Effects in SRAM-based Register Files. - Zhe Zhang; Surendra Hemaram; Mahta Mayahinia; Christian Weis; Norbert Wehn; Mehdi B. Tahoori; Sani R. Nassif; Grigor Tshagharyan; Gurgen Harutyunyan; Yervant Zorian (ETS, 2025)

Machine Learning for Improving Timing Accuracy. - Mohamed Amine Riahi; Sani R. Nassif; Norbert Wehn (ISCAS, 2025)

rptu.de/channel-codes: An Update on the Maximum Likelihood Decoding Performance of 5G-NR Channel Codes. - Oliver Griebel; Kira Kraft; Lucas Johannsen; Claus Kestel; Gabriel Machado Dick; Norbert Wehn (ISTC, 2025)

HW/SW Implementation of MiRitH on Embedded Platforms. - Maximilian Schöffel; Hiandra Tomasi; Norbert Wehn (LASCAS, 2025)

A 15 Gb/s Single-Ended Active-Inductive Equalizer with an Optimized Gain-Enhancing Technique. - Mohammadreza Esmaeilpour; Marco Mestice; Jan Lappas; Christian Weis; Norbert Wehn (NewCAS, 2025)

Recent Advances on Machine Learning-aided DSP for Short-reach and Long-haul Optical Communications. - Laurent Schmalen; Vincent Lauinger; Jonas Ney; Norbert Wehn; Patrick Matalla; Sebastian Randel; Alexander von Bank; Eike-Manuel Edelmann (OFC, 2025)

DRAMPower 5: An Open-Source Power Simulator for Current Generation DRAM Standards. - Lukas Steiner; Thomas Psota; Marco Mörz; Derek Christ; Matthias Jung 001; Norbert Wehn (RAPIDO@HiPEAC, 2025)

Optimization and Implementation of DRAM-Based Interleavers for Free-Space Optical Communication Beyond 100 Gbit/s. - Lukas Steiner; Uwe Wasenmüller; Norbert Wehn (IEEE Access, 2025)

eFAirWrite: Bringing energy efficient text entry to next generation smart devices. - Muhammad Mohsin Ghaffar; Ahmad Abdullah; Junaid Younas; Vladimir Rybalkin; Jonas Ney; Paul Lukowicz; Norbert Wehn (Expert Syst. Appl., 2025)

DATE on the Edge: On-Site Oil Spill Detection and Thickness Estimation Using Drone-Based Radar Backscattering. - Bilal Hammoud; Charbel Bou-Mosleh; Norbert Wehn (IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2025)

Row-Merged Polar Codes: Analysis, Design, and Decoder Implementation. - Andreas Zunker; Marvin Geiselhart; Lucas Johannsen; Claus Kestel; Stephan ten Brink; Timo Vogt; Norbert Wehn (IEEE Trans. Commun., 2025)

ECNN: A Low-complex, Adjustable CNN for Industrial Pump Monitoring Using Vibration Data. - Jonas Ney; Norbert Wehn (CoRR, 2025)

Enhanced LPDDR4X PHY in 12 nm FinFET. - Johannes Feldmann; Jan Lappas; Mohammadreza Esmaeilpour; Hussien Abdo; Christian Weis; Norbert Wehn (CoRR, 2025)

Lessons learned from designing an open-source automated feedback system for STEM education. - Steffen Steinert; Lars Krupp; Karina E. Avila; Anke S. Janssen; Verena Ruf; David Dzsotjan; Christian de Schryver; Jakob Karolus; Stefan Ruzika; Karen Joisten; Paul Lukowicz; Jochen Kuhn; et al. (Educ. Inf. Technol., 2025)

No Scratch Quantum Computing by Reducing Qubit Overhead for Efficient Arithmetics. - Omid Faizy; Norbert Wehn; Paul Lukowicz; Maximilian Kiefer-Emmanouilidis (CoRR, 2025)

Split'n'Cover: ISO 26262 Hardware Safety Analysis with SystemC. - Lukas Steiner; Kira Kraft; Derek Christ; Denis Uecker; Christian Malek; Matthias Jung 001; Norbert Wehn (Int. J. Parallel Program., 2025)

CRADLE: Conversational RTL Design Space Exploration with LLM-based Multi-Agent Systems. - Lukas Krupp; Maximilian Schöffel; Elias Biehl; Norbert Wehn (CoRR, 2025)

Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices. - Dominik Marek Loroch; Johannes Feldmann; Vladimir Rybalkin; Norbert Wehn (CoRR, 2025)

Correction: Split'n'Cover: ISO 26,262 Hardware Safety Analysis with SystemC. - Lukas Steiner; Kira Kraft; Derek Christ; Denis Uecker; Christian Malek; Matthias Jung 001; Norbert Wehn (Int. J. Parallel Program., 2025)

A Lightweight PUF-Based Weights Obfuscation Technique for Secure In-Memory AI Inference. - Luca Parrini; Anirban Kar; Benjamin Hettwer; Taha Soliman; Yogesh Singh Chauhan; Hussam Amrouch; Norbert Wehn (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)