An 18mW 90 to 770MHz synthesizer with agile auto-tuning for digital TV-tuners. - Masazumi Marutani; Hideaki Anbutsu; Masafumi Kondo; Noriaki Shirai; Hiroshi Yamazaki; Yuu Watanabe (ISSCC, 2006)

A fully integrated triple-band CMOS power amplifier for WCDMA mobile handsets. - Kouichi Kanda; Yoichi Kawano; Takao Sasaki; Noriaki Shirai; Tetsuro Tamura; Shigeaki Kawai; Masahiro Kudo; Tomotoshi Murakami; Hiroyuki Nakamoto; Nobumasa Hasegawa; Hideki Kano; Nobuhiro Shimazui; et al. (ISSCC, 2012)

3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE. - Kazuaki Oishi; Eiji Yoshida; Yasufumi Sakai; Hideki Takauchi; Yoichi Kawano; Noriaki Shirai; Hideki Kano; Masahiro Kudo; Tomotoshi Murakami; Tetsuro Tamura; Seitaro Kawai; Shinji Yamaura; et al. (ISSCC, 2014)

A real-time dense stereo matching method for critical environment sensing in autonomous driving. - Qian Long; Qiwei Xie; Seiichi Mita; Kazuhisa Ishimaru; Noriaki Shirai (ITSC, 2014)

A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE. - Kazuaki Oishi; Eiji Yoshida; Yasufumi Sakai; Hideki Takauchi; Yoichi Kawano; Noriaki Shirai; Hideki Kano; Masahiro Kudo; Tomotoshi Murakami; Tetsuro Tamura; Shigeaki Kawai; Kazuo Suto; et al. (IEEE J. Solid State Circuits, 2014)

A 28-Gb/s 4.5-pJ/bit transceiver with 1-tap decision feedback equalizer in 28-nm CMOS. - Hiroki Miyaoka; Futoshi Terasawa; Masahiro Kudo; Hideki Kano; Atsushi Matsuda; Noriaki Shirai; Shigeaki Kawai; Tomoyuki Arai; Yutaka Ide; Kazuhiro Terashima; Hirohito Higashi; Tomokazu Higuchi; et al. (A-SSCC, 2015)

Accurate 3D Reconstruction from Naturally Swaying Cameras. - Yasunori Nishioka; Fumihiko Sakaue; Jun Sato; Kazuhisa Ishimaru; Naoki Kawasaki; Noriaki Shirai (VISAPP (3), 2015)

Real-time stereo vision system at nighttime with noise reduction using simplified non-local matching cost. - Yuquan Xu; Qian Long; Seiichi Mita; Hossein Tehrani Niknejad; Kazuhisa Ishimaru; Noriaki Shirai (Intelligent Vehicles Symposium, 2016)

A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS. - Hiroki Miyaoka; Futoshi Terasawa; Masahiro Kudo; Hideki Kano; Atsushi Matsuda; Noriaki Shirai; Shigeaki Kawai; Takayuki Shibasaki; Takumi Danjo; Yuuki Ogata; Yasufumi Sakai; Hisakatsu Yamaguchi; et al. (VLSI Circuits, 2016)