A 5GHz Duty-Cycle Correcting Clock Distribution Network for the POWER6 Microprocessor. - Michael G. R. Thomson; Phillip J. Restle; Norman K. James (ISSCC, 2006)

Design of the Power6 Microprocessor. - Joshua Friedrich; Bradley D. McCredie; Norman K. James; Bill Huott; Brian W. Curran; Eric Fluhr; Gaurav Mittal; Eddie Chan; Yuen H. Chan; Donald W. Plass; Sam G. Chu; Hung Q. Le; et al. (ISSCC, 2007)

Comparison of Split-Versus Connected-Core Supplies in the POWER6 Microprocessor. - Norman K. James; Phillip J. Restle; Joshua Friedrich; Bill Huott; Bradley D. McCredie (ISSCC, 2007)

A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor. - Alan J. Drake; Robert M. Senger; Harmander Deogun; Gary D. Carpenter; Soraya Ghiasi; Tuyet Nguyen; Norman K. James; Michael S. Floyd; Vikas Pokala (ISSCC, 2007)