Design and FPGA-based multi-channel, low phase-jitter ADPLL for audio data converter. - Noura Ben Ameur; Nouri Masmoudi; Mourad Loulou (NEWCAS, 2013)

FPGA-Based Design Δ-Σ Audio D/A Converter with a Resolution Clock Generator Enhancement Circuit. - Noura Ben Ameur; Nouri Masmoudi; Mourad Loulou (J. Circuits Syst. Comput., 2015)

A Low-Phase Noise ADPLL Based on a PRBS-Dithered DDS Enhancement Circuit. - Noura Ben Ameur (J. Circuits Syst. Comput., 2017)