Development of a hyper dynamic manipulator utilizing joint stops. - Aiguo Ming; Nozomu Harada; Makoto Shimojo; Makoto Kajitani (IROS, 2003)

1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and Pillar. - Yisuo Li; Ken'ichi Kanazawa; Tetsuo Izawa; Koji Sakui; Georg Strof; Oskar Baumgartner; Gerhard Rzepa; Markus Karner; Zlatan Stanojevic; Nozomu Harada; Fujio Masuoka (IMW, 2021)

Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT). - Koji Sakui; Nozomu Harada (IMW, 2021)

Dynamic Flash Memory with Fast Block Refresh. - Koji Sakui; Masakazu Kakumu; Nozomu Harada (NVMTS, 2022)

Dynamic Flash Memory Operation Experimentally Validated with 65nm SOI Technology. - Koji Sakui; Daniele Garbin; Yoshihisa Iwata; Gautam Gaddemane; Yisuo Li; Yiqun Wan; Ken'ichi Kanazawa; Eyup Can Demir; Iwao Kunishima; Andrea Fantini; Masakazu Kakumu; Christophe Lorant; et al. (IMW, 2025)