On Identification of Totally Symmetric Boolean Functions. - Nripendra N. Biswas (IEEE Trans. Computers, 1970)

Minimization of Boolean Functions. - Nripendra N. Biswas (IEEE Trans. Computers, 1971)

Comments on "Identification of Totally Symmetric Boolean Functions". - Nripendra N. Biswas (IEEE Trans. Computers, 1973)

State Minimization of Incompletely Specified Sequential Machines. - Nripendra N. Biswas (IEEE Trans. Computers, 1974)

Minimization of Incompletely Specified Sequential Machines. - C. V. S. Rao; Nripendra N. Biswas (IEEE Trans. Computers, 1975)

Further Comments on "Closure Partition Method for Minimizing Incomplete Sequential Machines". - C. V. S. Rao; Nripendra N. Biswas (IEEE Trans. Computers, 1976)

An Algorithm for Testing 2-Asummability of Boolean Functions. - Anil K. Sarje; Nripendra N. Biswas (IEEE Trans. Computers, 1977)

A New Approach to 2-Asummability Testing. - Anil K. Sarje; Nripendra N. Biswas (IEEE Trans. Computers, 1979)

Optimal Interconnections in the Design of Microprocessors and Digital Systems. - Ayakannu Mathialagan; Nripendra N. Biswas (IEEE Trans. Computers, 1980)

Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers. - Ayakannu Mathialagan; Nripendra N. Biswas (IEEE Trans. Computers, 1981)

A Design for Complete Testability of Programmable Logic Arrays. - K. S. Ramanatha; Nripendra N. Biswas (ITC, 1982)

An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays. - K. S. Ramanatha; Nripendra N. Biswas (IEEE Trans. Computers, 1983)

A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays. - K. S. Ramanatha; Nripendra N. Biswas (IEEE Trans. Computers, 1983)

On the Minimization of Wordwidth in the Control Memory of a Microprogrammed Digital Computer. - Chamarty D. V. P. Rao; Nripendra N. Biswas (IEEE Trans. Computers, 1983)

Multiple output minimization. - Prathima Agrawal; Vishwani D. Agrawal; Nripendra N. Biswas (DAC, 1985)

: A Testable PLA Design with Minimal Hardware and Test Set. - James Jacob; Nripendra N. Biswas (ITC, 1985)

On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors. - Nripendra N. Biswas (IEEE Trans. Computers, 1985)

Computer-Aided Minimization Procedure for Boolean Functions. - Nripendra N. Biswas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

Simple methods for the calculation of root of a reconfigurable binary tree structure. - Nripendra N. Biswas; S. Srinivas (Proc. IEEE, 1987)

A centrally controlled shuffle network for reconfigurable and fault-tolerant architecture. - Nripendra N. Biswas; Sampalli Srinivas; Trishala Dharanendra (SIGARCH Comput. Archit. News, 1987)

Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs. - K. S. Ramanatha; Nripendra N. Biswas (IEEE Trans. Computers, 1988)

An algorithm for multiple output minimization. - B. Gurunath; Nripendra N. Biswas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

A Reconfigurable Tree Architecture with Multistage Interconnection Network. - Nripendra N. Biswas; Sampalli Srinivas (IEEE Trans. Computers, 1990)

Further Comments on "Detection of Faults in Programmable Logic Arrays". - James Jacob; Nripendra N. Biswas (IEEE Trans. Computers, 1990)

On covering distant minterms by the camp algorithm. - Nripendra N. Biswas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures. - Sampalli Srinivas; Nripendra N. Biswas (IEEE Trans. Computers, 1992)

Logic design theory. - Nripendra N. Biswas (Prentice Hall, 1993)

Cubical CAMP for minimization of Boolean functions. - Nripendra N. Biswas; C. Srikanth; James Jacob (VLSI Design, 1996)