Charge Programming Techniques for SC Biquads. - F. P. Martins; Nuno F. Paulino; José E. Franca (ISCAS, 1993)

High-Linearity Calibration of Low-Resolution Digital-to-Analog Converters. - João Goes; José E. Franca; Nuno F. Paulino; Jorge A. Grilo; Gabor C. Temes (ISCAS, 1994)

Programmable CMOS switched-capacitor biquad using quasi-passive algorithmic DAC's. - Nuno Paulino 002; José E. Franca; F. P. Martins (IEEE J. Solid State Circuits, 1995)

Design methodology for optimization of analog building blocks using genetic algorithms. - Nuno F. Paulino; João Goes; Adolfo Steiger-Garção (ISCAS (5), 2001)

An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs. - Pedro Amaral 001; João Goes; Nuno F. Paulino; Adolfo Steiger-Garção (ISCAS (5), 2002)

Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion. - Bruno Vaz; Nuno F. Paulino; João Goes; R. Costa; Rui Manuel Tavares; Adolfo Steiger-Garção (ISCAS (1), 2002)

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation. - Guiomar Evans; João Goes; Adolfo Steiger-Garção; Manuel Duarte Ortigueira; Nuno F. Paulino; Jilseph Lopes Silva (ISCAS (1), 2003)

Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver. - Nuno F. Paulino; M. Serrazina; João Goes; Adolfo Steiger-Garção (ISCAS (1), 2003)

Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance. - Rui Manuel Tavares; Bruno Vaz; João Goes; Nuno F. Paulino; Adolfo Steiger-Garção (ISCAS (1), 2003)

Efficient digital self-calibration of video-rate pipeline ADCs using white Gaussian noise. - M. Unterweissacher; João Goes; Nuno F. Paulino; Guiomar Evans; Manuel Duarte Ortigueira (ISCAS (1), 2003)

On-chip built-in self-test of video-rate ADCs using Gaussian noise. - João Goes; Nuno Paulino 002; Guiomar Evans (ISCAS (1), 2005)

Switched-capacitor circuits using a single-phase scheme. - João Goes; Bruno Vaz; Nuno Paulino 002; H. Pinto; Rui Monteiro; Adolfo Steiger-Garção (ISCAS (4), 2005)

A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing. - Bruno Vaz; João Goes; R. Piloto; J. Neto; Rui Monteiro; Nuno Paulino 002 (ISCAS (4), 2005)

Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme. - João Goes; Nuno Paulino 002; H. Pinto; Rui Monteiro; Bruno Vaz; Adolfo Steiger-Garção (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Optimum Sizing and Compensation of Two-Stage CMOS Amplifiers Based On a Time-Domain Approach. - Rui Santos-Tavares; Nuno Paulino 002; João Goes; João Pedro Oliveira 003 (ICECS, 2006)

Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability. - Acacio Galhardo; João Goes; Nuno F. Paulino (ISCAS, 2006)

A 0.9V ΔΣ Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique. - João Goes; Bruno Vaz; Rui Monteiro; Nuno Paulino 002 (ISSCC, 2006)

Low-Voltage Low-Power Broadband CMOS Analogue Circuit for White Gaussian Noise Generation. - Guiomar Evans; João Goes; Nuno F. Paulino (J. Low Power Electron., 2006)

Design of Improved Rail-to-Rail Low-Distortion and Low-Stress Switches in Advanced CMOS Technologies. - Acacio Galhardo; João Goes; Nuno Paulino 002 (ICECS, 2007)

Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs. - João Pedro Oliveira 003; João Goes; Bruno Esperanca; Nuno F. Paulino; Jorge Fernandes (ISCAS, 2007)

Switched-Capacitor Multiply-By-Two Amplifier Insensitive to Component Mismatches. - João Goes; João Cardoso Pereira; Nuno Paulino 002; Manuel Medeiros Silva (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids. - José Rui Custódio; Nuno Paulino 002; João Goes; Erik Bruun (ICECS, 2008)

New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification. - João Pedro Oliveira 003; João Goes; Nuno Paulino 002; Jorge R. Fernandes; Júlio Paisana (ICECS, 2008)

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC. - Bruno Esperanca; João Goes; Rui Santos-Tavares; Acacio Galhardo; Nuno Paulino 002; Manuel Medeiros Silva (ISCAS, 2008)

New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise. - Michael Figueiredo; Nuno Paulino 002; Guiomar Evans; João Goes (ISCAS, 2008)

Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback. - Acacio Galhardo; João Goes; Nuno Paulino 002 (ISCAS, 2008)

A CMOS variable width short-pulse generator circuit for UWB RADAR applications. - Nuno Paulino 002; João Goes; Adolfo Steiger-Garção (ISCAS, 2008)

Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm. - Rui Santos-Tavares; Nuno Paulino 002; José Higino; João Goes; João Pedro Oliveira 003 (ISCAS, 2008)

A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS. - Blazej Nowacki; Nuno Paulino 002; João Goes (ESSCIRC, 2011)

A DC-DC Step-Up μ-Power Converter for Energy Harvesting Applications, Using Maximum Power Point Tracking, Based on Fractional Open Circuit Voltage. - Carlos Carvalho 001; Guilherme Lavareda; Nuno Paulino 002 (DoCEIS, 2011)

A step-up μ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point tracking. - Carlos Carvalho 001; Guilherme Lavareda; Jose Lameiro; Nuno Paulino 002 (ISCAS, 2011)

A second-order switched-capacitor ΔΣ modulator using very incomplete settling. - Blazej Nowacki; Nuno Paulino 002; João Goes (ISCAS, 2011)

Low phase-noise temperature compensated self-biased ring oscillator. - Somayeh Abdollahvand; João Goes; Luís B. Oliveira; Luís Gomes 001; Nuno Paulino 002 (ISCAS, 2012)

Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions. - João L. A. de Melo; Blazej Nowacki; Nuno Paulino 002; João Goes (ISCAS, 2012)

Current-mode reference shifting solution for MDAC-based analog-to-digital converters. - João Pacheco; Michael Figueiredo; Nuno Paulino 002; João Goes (ISCAS, 2012)

A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications. - Carlos Carvalho 001; Nuno Paulino 002 (DoCEIS, 2013)

Design of a Fully Differential Power Output Stage for a Class D Audio Amplifier Using a Single-Ended Power Supply. - Pedro V. Leitão; João L. A. de Melo; Nuno F. Paulino (DoCEIS, 2013)

Design of a 3rd Order 1.5-Bit Continuous-Time Fully Differential Sigma-Delta (ΣΔ) Modulator Optimized for a Class D Audio Amplifier Using Differential Pairs. - Nuno Pereira 002; João L. A. de Melo; Nuno F. Paulino (DoCEIS, 2013)

A Switched-Capacitor Band-Pass Biquad Filter Using a Simple Quasi-unity Gain Amplifier. - Hugo Serra; Nuno F. Paulino; João Goes (DoCEIS, 2013)

The design of an audio power amplifier as a class project for undergraduate students. - Nuno Paulino 002; João Pedro Oliveira 003; Rui Santos-Tavares (ISCAS, 2013)

A switched-capacitor biquad using a simple quasi-unity gain amplifier. - Hugo Serra; Nuno Paulino 002; João Goes (ISCAS, 2013)

A simple 1 GHz non-overlapping two-phase clock generators for SC circuits. - Blazej Nowacki; Nuno Paulino 002; João Goes (MIXDES, 2013)

A 1.2-V 165-µ W 0.29-mm2 Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range. - José Rui Custódio; João Goes; Nuno Paulino 002; João Pedro Oliveira 003; Erik Bruun (IEEE Trans. Biomed. Circuits Syst., 2013)

A Top-Down Optimization Methodology for SC Filter Circuit Design Using Varying Goal Specifications. - Hugo Serra; Rui Santos-Tavares; Nuno Paulino 002 (DoCEIS, 2014)

A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications. - João L. A. de Melo; Fábio Querido; Nuno Paulino 002; João Goes (ISCAS, 2014)

A low power 4th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling. - Blazej Nowacki; Nuno Paulino 002; João Goes (ISCAS, 2014)

The design of a light barrier system as an undergraduate laboratory project. - Luís Bica Oliveira; Nuno Paulino 002; Nuno Pereira 002 (ISCAS, 2014)

A top-down optimization methodology for SC filter circuit design. - Hugo Serra; Rui Santos-Tavares; Nuno Paulino 002 (ISCAS, 2014)

A hybrid current-mode passive second-order continuous-time ΣΔ modulator. - Pawel Sniatala; Mariusz Naumowicz; João L. A. de Melo; Nuno Paulino 002; João Goes (MIXDES, 2014)

Analysis of a Multi-Ratio Switched Capacitor DC-DC Converter for a Supercapacitor Power Supply. - Hugo Serra; Ricardo Madeira; Nuno Paulino 002 (DoCEIS, 2015)

A current-mode VCO-based amplifier-less 2nd-order ΔΣ modulator with over 85dB SNDR. - Somayeh Abdollahvand; Nuno Paulino 002; Luís Gomes 001; João Goes (ISCAS, 2015)

A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems. - João L. A. de Melo; Pedro V. Leitão; João Goes; Nuno Paulino 002 (MIXDES, 2015)

A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW. - João L. A. de Melo; João Goes; Nuno Paulino 002 (VLSIC, 2015)

CMOS Indoor Light Energy Harvesting System for Wireless Sensing Applications: An Overview. - Carlos Carvalho 001; Nuno Paulino 002 (DoCEIS, 2016)

15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM. - Blazej Nowacki; Nuno Paulino 002; João Goes (ISSCC, 2016)

Analysis and implementation of a power management unit with a multiratio switched capacitor DC-DC converter for a supercapacitor power supply. - Ricardo Madeira; Nuno Paulino 002 (Int. J. Circuit Theory Appl., 2016)

Design Methodology for an All CMOS Bandgap Voltage Reference Circuit. - Ricardo Madeira; Nuno Paulino 002 (DoCEIS, 2017)

A 3rd order MASH switched-capacitor ΣΔM using ultra incomplete settling employing an area reduction technique. - David Fouto; Nuno Paulino 002 (ISCAS, 2017)

A 50 Hz SC notch filter for IoT applications. - Hugo Serra; João Pedro Oliveira 003; Nuno Paulino 002 (ISCAS, 2017)

A Third-Order MASH $ Sigma Delta $ Modulator Using Passive Integrators. - Blazej Nowacki; Nuno Paulino 002; João Goes (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers. - Hugo Serra; Rui Santos-Tavares; Nuno Paulino 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System. - Luís Bica Oliveira; Nuno Paulino 002; João Pedro Oliveira 003; Rui Santos-Tavares; Nuno Pereira 002; João Goes (IEEE Trans. Educ., 2017)

Experimental Set-up for an IoT Power Supply with an 130 nm SC DC-DC Converter. - Ricardo Madeira; Nuno Correia 001; João Pedro Oliveira 003; Nuno Paulino 002 (DoCEIS, 2018)

Live Demonstration: An Automated Test Bench for an 130nm SC DC-DC Converter. - Ricardo Madeira; Nuno Correia 001; João Pedro Oliveira 003; Nuno Paulino 002 (ISCAS, 2018)

A 130 nm CMOS Power Management Unit With a Multi-Ratio Core SC DC-DC Converter for a Supercapacitor Power Supply. - Ricardo Madeira; João Pedro Oliveira 003; Nuno Paulino 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Continuous-Time Delta-Sigma Modulators Based on Passive RC Integrators. - João L. A. de Melo; Nuno Paulino 002; João Goes (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A 0.9-V Programmable Second-Order Bandpass Switched-Capacitor Filter for IoT Applications. - Hugo Serra; João Pedro Oliveira 003; Nuno Paulino 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Combined Organic Photovoltaic Cells and Ultra Low Power CMOS Circuit for Indoor Light Energy Harvesting. - Duarte Batista; Luís Bica Oliveira; Nuno Paulino 002; Carlos Carvalho 001; João Pedro Oliveira 003; Joana Farinhas; Ana Charas; Pedro Mendonça dos Santos (Sensors, 2019)

A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm. - João L. A. de Melo; Nuno Pereira 002; Pedro V. Leitão; Nuno Paulino 002; João Goes (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 0.9-V Analog-to-Digital Acquisition Channel for an IoT Water Management Sensor Node. - Hugo Serra; Ivan Bastos; João L. A. de Melo; João Pedro Oliveira 003; Nuno Paulino 002; Elyes Nefzaoui; Tarik Bourouina (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A Simple Analysis to Determine the Limits of a CMOS Technology to Implement SC DC-DC Converters. - Ricardo Madeira; Nuno Paulino 002 (DoCEIS, 2020)

Analysis of capacitance spread reduction techniques for 50-Hz switched-capacitor notch filters. - Hugo Serra; João Pedro Oliveira 003; Nuno Paulino 002 (Int. J. Circuit Theory Appl., 2020)

Transistor-level optimization methodology for the complete design of switched-capacitor filter circuits. - Hugo Serra; Rui Santos-Tavares; Nuno Paulino 002 (Int. J. Circuit Theory Appl., 2021)

A Calibration Scheme for a Sigma-Delta Modulator Using Passive Integrators. - Inês Nogueira De Brito; Nuno Paulino 002; Blazej Nowacki; Tommy Mullane (PRIME, 2023)

Recent Trends in Audio Power Amplifiers for Battery-Powered Applications. - José Francisco Luís; Nuno Paulino 002 (DoCEIS, 2025)

Band Pass NS-DEM for SAR Pipeline ADCs. - Rafael Loução; Nuno Paulino 002 (ISCAS, 2025)