Low-power array architectures for motion estimation. - Leonel Sousa; Nuno Roma (MMSP, 1999)

In the Development and Evaluation of Specialized Processors for Computing High-Order 2-D Image Moments in Real-Time. - Nuno Roma; Leonel Sousa (CAMP, 2000)

A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation. - Nuno Roma; Leonel Sousa (VLSI-SOC, 2001)

Insertion of irregular-shaped logos in the compressed DCT domain. - Nuno Roma; Leonel Sousa (DSP, 2002)

Efficient and configurable full-search block-matching processors. - Nuno Roma; Leonel Sousa (IEEE Trans. Circuits Syst. Video Technol., 2002)

Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs. - Nuno Roma; Tiago Dias 001; Leonel Sousa (FPL, 2003)

Fast transcoding architectures for insertion of non-regular shaped objects in the compressed DCT-domain. - Nuno Roma; Leonel Sousa (Signal Process. Image Commun., 2003)

Automatic Synthesis of Motion Estimation Processors Based on a New Class of Hardware Architectures. - Nuno Roma; Leonel Sousa (J. VLSI Signal Process., 2003)

Least squares motion estimation algorithm in the compressed DCT domain for H.26x/MPEG-x video sequences. - Nuno Roma; Leonel Sousa (AVSS, 2005)

Efficient VLSI Architecture for Real-Time Motion Estimation in Advanced Video Coding. - Tiago Dias 001; Nuno Roma; Leonel Sousa (SoCC, 2005)

Application Specific Instruction Set Processor for Adaptive Video Motion Estimation. - Svetislav Momcilovic; Tiago Dias 001; Nuno Roma; Leonel Sousa (DSD, 2006)

Low Power Distance Measurement Unit for Real-Time Hardware Motion Estimators. - Tiago Dias 001; Nuno Roma; Leonel Sousa (PATMOS, 2006)

Adaptive Motion Estimation Algorithm for H.264/AVC. - Svetislav Momcilovic; Nuno Roma; Leonel Sousa (DSP, 2007)

Efficient Hybrid DCT-Domain Algorithm for Video Spatial Downscaling. - Nuno Roma; Leonel Sousa (EURASIP J. Adv. Signal Process., 2007)

Adaptive Motion Estimation Processor for Autonomous Video Devices. - Tiago Dias 001; Svetislav Momcilovic; Nuno Filipe Valentim Roma; Leonel Sousa (EURASIP J. Embed. Syst., 2007)

Reconfigurable architectures and processors for real-time video motion estimation. - Tiago Dias 001; Nuno Roma; Leonel Sousa; Miguel Ribeiro (J. Real Time Image Process., 2007)

Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units. - Nuno Sebastião; Tiago Dias 001; Nuno Roma; Paulo F. Flores; Leonel Sousa (DSD, 2008)

Distributed Software Platform for Automation and Control of General Anaesthesia. - Gesner Passos; Nuno Roma; Bertinho Andrade da Costa; Leonel Sousa; João Miranda Lemos (ISPDC, 2009)

A Parallel Programming Framework for Multi-core DNA Sequence Alignment. - Tiago Jose Barreiros Martins de Almeida; Nuno Filipe Valentim Roma (CISIS, 2010)

Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems. - Tiago Dias 001; Nuno Roma; Leonel Sousa (DASIP, 2010)

Integrated accelerator architecture for DNA sequences alignment with enhanced traceback phase. - Nuno Sebastião; Tiago Dias 001; Nuno Roma; Paulo F. Flores (HPCS, 2010)

H.264/AVC framework for multi-core embedded video encoders. - Tiago Dias 001; Nuno Roma; Leonel Sousa (SoC, 2010)

p264: open platform for designing parallel H.264/AVC video encoders on multi-core systems. - António Rodrigues; Nuno Roma; Leonel Sousa (NOSSDAV, 2010)

Advantages and GPU implementation of high-performance indexed DNA search based on suffix arrays. - Gustavo Encarnação; Nuno Sebastião; Nuno Roma (HPCS, 2011)

High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems. - Tiago Dias 001; Sebastián López; Nuno Roma; Leonel Sousa (ICSAMOS, 2011)

A tutorial overview on the properties of the discrete cosine transform for encoded image and video processing. - Nuno Roma; Leonel Sousa (Signal Process., 2011)

A flexible architecture for the computation of direct and inverse transforms in H.264/AVC video codecs. - Tiago Dias 001; Sebastián López; Nuno Roma; Leonel Sousa (IEEE Trans. Consumer Electron., 2011)

High Performance Unified Architecture for Forward and Inverse Quantization in H.264/AVC. - Tiago Dias 001; Luis Rosario; Nuno Roma; Leonel Sousa (DSD, 2012)

Multi-level Parallelization of Advanced Video Coding on Hybrid CPU+GPU Platforms. - Svetislav Momcilovic; Nuno Roma; Leonel Sousa (Euro-Par Workshops, 2012)

System-level prototyping framework for heterogeneous multi-core architecture applied to biological sequence analysis. - Nuno Roma; Pedro Magalhães (RSP, 2012)

Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phase. - Nuno Sebastião; Nuno Roma; Paulo F. Flores (Microprocess. Microsystems, 2012)

Integrated Hardware Architecture for Efficient Computation of the $n$-Best Bio-Sequence Local Alignments in Embedded Platforms. - Nuno Sebastião; Nuno Roma; Paulo F. Flores (IEEE Trans. Very Large Scale Integr. Syst., 2012)

BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment. - Nuno Neves 002; Nuno Sebastião; Andre Patricio; David Martins de Matos; Pedro Tomás; Paulo F. Flores; Nuno Roma (ASAP, 2013)

High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecs. - Tiago Dias 001; Nuno Roma; Leonel Sousa (DASIP, 2013)

Scalable and high throughput biosensing platform. - José M. Leitão; José A. Germano; Nuno Roma; Ricardo Chaves; Pedro Tomás (FPL, 2013)

A flexible shared library profiler for early estimation of performance gains in heterogeneous systems. - Adrian Matoga; Ricardo Chaves; Pedro Tomás; Nuno Roma (HPCS, 2013)

Transparent Application Acceleration by Intelligent Scheduling of Shared Library Calls on Heterogeneous Systems. - João Colaço; Adrian Matoga; Aleksandar Ilic; Nuno Roma; Pedro Tomás; Ricardo Chaves (PPAM (1), 2013)

HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels. - Sergio Paiagua; Frederico Pratas; Pedro Tomás; Nuno Roma; Ricardo Chaves (SBAC-PAD, 2013)

Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment. - Nuno Sebastião; Nuno Roma; Paulo F. Flores (Concurr. Comput. Pract. Exp., 2013)

Scalable Unified Transform Architecture for Advanced Video Coding Embedded Systems. - Tiago Dias 001; Sebastián López; Nuno Roma; Leonel Sousa (Int. J. Parallel Program., 2013)

GPU Accelerated Stochastic Inversion of Deep Water Seismic Data. - Tomás Ferreirinha; Rúben Nunes; Amílcar Soares 002; Frederico Pratas; Pedro Tomás; Nuno Roma (Euro-Par Workshops (1), 2014)

Opencl parallelization of the HEVC de-quantization and inverse transform for heterogeneous platforms. - Diego F. de Souza; Nuno Roma; Leonel Sousa (EUSIPCO, 2014)

Low-power vectorial VLIW architecture for maximum parallelism exploitation of dynamic programming algorithms. - Miguel Tairum Cruz; Pedro Tomás; Nuno Roma (HPCS, 2014)

Burrows-Wheeler Transform based indexed exact search on a multi-GPU OpenCL platform. - David Nogueira; Pedro Tomás; Nuno Roma (HPCS, 2014)

Optimized ASIP architecture for compressed BWT-indexed search in bioinformatics applications. - Nuno Sebastião; Paulo F. Flores; Nuno Roma (HPCS, 2014)

Cooperative CPU+GPU deblocking filter parallelization for high performance HEVC video codecs. - Diego F. de Souza; Nuno Roma; Leonel Augusto Sousa (ICASSP, 2014)

Collaborative inter-prediction on CPU+GPU systems. - Svetislav Momcilovic; Aleksandar Ilic; Nuno Roma; Leonel Sousa (ICIP, 2014)

FEVES: Framework for Efficient Parallel Video Encoding on Heterogeneous Systems. - Aleksandar Ilic; Svetislav Momcilovic; Nuno Roma; Leonel Sousa (ICPP, 2014)

Stream Oriented Modular Architecture with Polymorphic Processing Engines. - Andriy Gorobets; Frederico Pratas; Nuno Roma; Pedro Tomás (SBAC-PAD (Workshops), 2014)

Cache-Oblivious parallel SIMD Viterbi decoding for sequence search in HMMER. - Miguel Ferreira; Nuno Roma; Luís M. S. Russo (BMC Bioinform., 2014)

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs. - Tiago Dias 001; Nuno Roma; Leonel Sousa (EURASIP J. Adv. Signal Process., 2014)

Dynamic Load Balancing for Real-Time Video Encoding on Heterogeneous CPU+GPU Systems. - Svetislav Momcilovic; Aleksandar Ilic; Nuno Roma; Leonel Sousa (IEEE Trans. Multim., 2014)

Fast and Scalable Thread Migration for Multi-core Architectures. - Miguel Rodrigues 002; Nuno Roma; Pedro Tomás (EUC, 2015)

Efficient data-stream management for shared-memory many-core systems. - Nuno Neves 002; Pedro Tomás; Nuno Roma (FPL, 2015)

GPU acceleration of the HEVC decoder inter prediction module. - Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (GlobalSIP, 2015)

Towards GPU HEVC intra decoding: Seizing fine-grain parallelism. - Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (ICME, 2015)

High performance IP core for HEVC quantization. - Tiago Dias 001; Nuno Roma; Leonel Sousa (ISCAS, 2015)

Run-Time Machine Learning for HEVC/H.265 Fast Partitioning Decision. - Svetislav Momcilovic; Nuno Roma; Leonel Sousa; Ivan Z. Milentijevic (ISM, 2015)

Energy-Efficient Architecture for DP Local Sequence Alignment: Exploiting ILP and DLP. - Miguel Tairum Cruz; Pedro Tomás; Nuno Roma (IWBBIO (2), 2015)

Multi-kernel Auto-Tuning on GPUs: Performance and Energy-Aware Optimization. - João Guerreiro 004; Aleksandar Ilic; Nuno Roma; Pedro Tomás (PDP, 2015)

HEVC in-loop filters GPU parallelization in embedded systems. - Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (SAMOS, 2015)

Implementation and performance analysis of efficient index structures for DNA search algorithms in parallel platforms. - Nuno Sebastião; Gustavo Encarnação; Nuno Roma (Concurr. Comput. Pract. Exp., 2015)

Acceleration of stochastic seismic inversion in OpenCL-based heterogeneous platforms. - Tomás Ferreirinha; Rúben Nunes; Leonardo Azevedo 002; Amílcar Soares 002; Frederico Pratas; Pedro Tomás; Nuno Roma (Comput. Geosci., 2015)

Morphable hundred-core heterogeneous architecture for energy-aware computation. - Nuno Neves 002; Henrique Mendes; Ricardo Chaves; Pedro Tomás; Nuno Roma (IET Comput. Digit. Tech., 2015)

Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms. - Nuno Neves 002; Nuno Sebastião; David Martins de Matos; Pedro Tomás; Paulo F. Flores; Nuno Roma (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Performance and Power-Aware Classification for Frequency Scaling of GPGPU Applications. - João Guerreiro 004; Aleksandar Ilic; Nuno Roma; Pedro Tomás (Euro-Par Workshops, 2016)

In-Cache Streaming: Morphable Infrastructure for Many-Core Processing Systems. - Nuno Neves 002; Adrien Mussio; Fabien Gonçalves; Pedro Tomás; Nuno Roma (Euro-Par Workshops, 2016)

Unsupervised variable-grained online phase clustering for heterogeneous/morphable processors. - Miguel Tairum Cruz; Pedro Tomás; Nuno Roma (HPCS, 2016)

Efficient HEVC decoder for heterogeneous CPU with GPU systems. - Biao Wang 001; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (MMSP, 2016)

A Cross-Core Performance Model for Heterogeneous Many-Core Architectures. - Rui Pinheiro; Nuno Roma; Pedro Tomás (VECPAR, 2016)

Editorial to special issue on energy efficient architectures for embedded systems. - Nuno Roma; José L. Núñez-Yáñez (EURASIP J. Embed. Syst., 2016)

Multi-objective kernel mapping and scheduling for morphable many-core architectures. - Nuno Neves 002; Rui Neves 001; Nuno Horta; Pedro Tomás; Nuno Roma (Expert Syst. Appl., 2016)

Exploiting task and data parallelism for advanced video coding on hybrid CPU + GPU platforms. - Svetislav Momcilovic; Nuno Roma; Leonel Sousa (J. Real Time Image Process., 2016)

GPU-assisted HEVC intra decoder. - Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (J. Real Time Image Process., 2016)

BowMapCL: Burrows-Wheeler Mapping on Multiple Heterogeneous Accelerators. - David Nogueira; Pedro Tomás; Nuno Roma (IEEE ACM Trans. Comput. Biol. Bioinform., 2016)

Adaptive Scheduling Framework for Real-Time Video Encoding on Heterogeneous Systems. - Aleksandar Ilic; Svetislav Momcilovic; Nuno Roma; Leonel Sousa (IEEE Trans. Circuits Syst. Video Technol., 2016)

Energy-efficient motion estimation with approximate arithmetic. - Roger Endrigo Carvalho Porto; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto; Nuno Roma; Leonel Sousa (MMSP, 2017)

Efficient parallelization of perturbative Monte Carlo QM/MM simulations in heterogeneous platforms. - Sebastião Miranda; Jonas Feldt; Frederico Pratas; Ricardo A. Mata; Nuno Roma; Pedro Tomás (Int. J. High Perform. Comput. Appl., 2017)

GPU Parallelization of HEVC In-Loop Filters. - Biao Wang 001; Diego F. de Souza; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Aleksandar Ilic; Nuno Roma; Leonel Sousa (Int. J. Parallel Program., 2017)

Special issue on real-time energy-aware circuits and systems for HEVC and for its 3D and SVC extensions. - Leonel Sousa; Nuno Roma (J. Real Time Image Process., 2017)

GHEVC: An Efficient HEVC Decoder for Graphics Processing Units. - Diego F. de Souza; Aleksandar Ilic; Nuno Roma; Leonel Sousa (IEEE Trans. Multim., 2017)

Adaptive In-Cache Streaming for Efficient Data Management. - Nuno Neves 002; Pedro Tomás; Nuno Roma (IEEE Trans. Very Large Scale Integr. Syst., 2017)

GPGPU Power Modeling for Multi-domain Voltage-Frequency Scaling. - João Guerreiro 004; Aleksandar Ilic; Nuno Roma; Pedro Tomás (HPCA, 2018)

Exploiting Compute Caches for Memory Bound Vector Operations. - João Vieira; Nuno Roma; Pedro Tomás; Paolo Ienne; Gabriel Falcão Paiva Fernandes (SBAC-PAD, 2018)

Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU. - Biao Wang 001; Diego F. de Souza; Mauricio Alvarez-Mesa; Chi Ching Chi; Ben H. H. Juurlink; Aleksandar Ilic; Nuno Roma; Leonel Sousa (Signal Process. Image Commun., 2018)

Stream data prefetcher for the GPU memory interface. - Nuno Neves 002; Pedro Tomás; Nuno Roma (J. Supercomput., 2018)

Heart Disease Detection Architecture for Lead I Off-the-Person ECG Monitoring Devices. - Pedro Sá; Helena Aidos; Nuno Roma; Pedro Tomás (EUSIPCO, 2019)

Power-Efficient Approximate SAD Architecture with LOA Imprecise Adders. - Roger Endrigo Carvalho Porto; Luciano Agostini; Bruno Zatt; Nuno Roma; Marcelo Schiavon Porto (LASCAS, 2019)

GPU Static Modeling Using PTX and Deep Structured Learning. - João Guerreiro 004; Aleksandar Ilic; Nuno Roma; Pedro Tomás (IEEE Access, 2019)

Flying tourist problem: Flight time and cost minimization in complex routes. - Rafael Marques; Luís M. S. Russo; Nuno Roma (Expert Syst. Appl., 2019)

DVFS-aware application classification to improve GPGPUs energy efficiency. - João Guerreiro 004; Aleksandar Ilic; Nuno Roma; Pedro Tomás (Parallel Comput., 2019)

Modeling and Decoupling the GPU Power Consumption for Cross-Domain DVFS. - João Guerreiro 004; Aleksandar Ilic; Nuno Roma; Pedro Tomás (IEEE Trans. Parallel Distributed Syst., 2019)

Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic. - Nuno Neves 002; Pedro Tomás; Nuno Roma (ASAP, 2020)

Processing Convolutional Neural Networks on Cache. - João Vieira; Nuno Roma; Gabriel Falcão 001; Pedro Tomás (ICASSP, 2020)

Exploiting Non-conventional DVFS on GPUs: Application to Deep Learning. - Francisco Mendes; Pedro Tomás; Nuno Roma (SBAC-PAD, 2020)

2PSA: An Optimized and Flexible Power-Precision Scalable Adder. - Roger Endrigo Carvalho Porto; Bruno Zatt; Nuno Roma; Luciano Agostini; Marcelo Schiavon Porto (SBCCI, 2020)

Dynamic Fused Multiply-Accumulate Posit Unit with Variable Exponent Size for Low-Precision DSP Applications. - Nuno Neves 002; Pedro Tomás; Nuno Roma (SiPS, 2020)

UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders. - Roger Endrigo Carvalho Porto; Marcel Moscarelli Corrêa; Jones Goebel; Bruno Zatt; Nuno Roma; Luciano Agostini; Marcelo Schiavon Porto (J. Real Time Image Process., 2020)

Positnn: Training Deep Neural Networks with Mixed Low-Precision Posit. - Gonçalo Raposo; Pedro Tomás; Nuno Roma (ICASSP, 2021)

Unlimited Vector Extension with Data Streaming Support. - Joao Mario Domingos; Nuno Neves 002; Nuno Roma; Pedro Tomás (ISCA, 2021)

Fast and energy-efficient approximate motion estimation architecture for real-time 4 K UHD processing. - Roger Endrigo Carvalho Porto; Murilo R. Perleberg; Vladimir Afonso; Bruno Zatt; Nuno Roma; Luciano Agostini; Marcelo Schiavon Porto (J. Real Time Image Process., 2021)

Compiler-Assisted Data Streaming for Regular Code Structures. - Nuno Neves 002; Pedro Tomás; Nuno Roma (IEEE Trans. Computers, 2021)

A Reconfigurable Posit Tensor Unit with Variable-Precision Arithmetic and Automatic Data Streaming. - Nuno Neves 002; Pedro Tomás; Nuno Roma (J. Signal Process. Syst., 2021)

A Compute Cache System for Signal Processing Applications. - João Vieira; Nuno Roma; Gabriel Falcão 001; Pedro Tomás (J. Signal Process. Syst., 2021)

Mode-Adaptive Subsampling of SAD/SSE Operations for Intra Prediction Cost Reduction. - Marcel Moscarelli Corrêa; Nuno Roma; Daniel Palomino 001; Guilherme Corrêa 001; Luciano Agostini (ISCAS, 2022)

Early prototyping and testing of CERN LHC CMS high-granularity calorimeter slow-control system. - Martim Rosado; Stavros Mallios; Pedro Tomás; Nuno Roma; André David (RSP, 2022)

gem5-ndp: Near-Data Processing Architecture Simulation From Low Level Caches to DRAM. - João Vieira; Nuno Roma; Gabriel Falcão 001; Pedro Tomás (SBAC-PAD, 2022)

Decoupling GPGPU voltage-frequency scaling for deep-learning applications. - Francisco Mendes; Pedro Tomás; Nuno Roma (J. Parallel Distributed Comput., 2022)

Compiling for Vector Extensions With Stream-Based Specialization. - Nuno Neves 002; Joao Mario Domingos; Nuno Roma; Pedro Tomás; Gabriel Falcão 001 (IEEE Micro, 2022)

Unified Posit/IEEE-754 Vector MAC Unit for Transprecision Computing. - Luís Crespo; Pedro Tomás; Nuno Roma; Nuno Neves 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools. - Joao Mario Domingos; Tiago Rocha; Nuno Neves 002; Nuno Roma; Pedro Tomás; Leonel Sousa (ASAP, 2023)

Neural Network Predictor for Fast Channel Change on DVB Set-Top-Boxes. - Tomás Malcata; Nuno Sebastião; Tiago Dias 001; Nuno Roma (DASIP, 2023)

GPU Acceleration of MIP Intra Prediction in VVC. - Iago Storch; Nuno Roma; Daniel Palomino 001; Sergio Bampi (EUSIPCO, 2023)

Trading Performance, Power, and Area on Low-Precision Posit MAC Units for CNN Training. - Luís Crespo; Pedro Tomás; Nuno Roma; Nuno Neves 002 (SBAC-PAD, 2023)

SBCCI 2022. - Nuno Roma; Bruno Zatt (IEEE Des. Test, 2023)

Alternative Reference Samples to Improve Coding Efficiency for Parallel Intra Prediction Solutions. - Iago Storch; Nuno Roma; Daniel Palomino 001; Sergio Bampi (LASCAS, 2024)

NDPmulator: Enabling Full-System Simulation for Near-Data Accelerators From Caches to DRAM. - João Vieira; Nuno Roma; Gabriel Falcão 001; Pedro Tomás (IEEE Access, 2024)

gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation. - João Vieira; Nuno Roma; Gabriel Falcão 001; Pedro Tomás (IEEE Comput. Archit. Lett., 2024)

RVEBS: Event-Based Sampling on RISC-V. - Tiago Rocha; Nuno Neves 002; Nuno Roma; Pedro Tomás; Leonel Sousa (DATE, 2025)

Real-Time ORB Accelerator with ROS Integration for Embedded FPGA SoCs. - Andre Costa; Pedro Tomás; Nuno Roma; Nuno Neves 002 (ISCAS, 2025)

Stream-Driven Acceleration for Embedded RISC-V SoCs. - João Maia; Ana Silveira; Gonçalo Midões; Nuno Neves 002; Pedro Tomás; Nuno Roma (ISCAS, 2025)

High-throughput packet aggregator for the back-end DAQ of CERN CMS HGCAL detector. - Martim Rosado; Pedro Tomás; Nuno Roma; André David (ISCAS, 2025)

Dynamic Reconfigurable FPU for Next-Generation Transprecision Computing. - Guilherme Dias; Luís Crespo; Pedro Tomás; Nuno Roma; Nuno Neves 002 (LASCAS, 2025)

Functional Validation of the RISC-V Unlimited Vector Extension. - Ana Fernandes; Luís Crespo; Nuno Neves 002; Pedro Tomás; Nuno Roma; Gabriel Falcão 001 (IEEE Embed. Syst. Lett., 2025)