Optimized bit level architectures for IIR filtering. - O. C. McNally; John V. McCanny; Roger F. Woods (ICCD, 1990)

A 40 megasample IIR filter chip. - O. C. McNally; John V. McCanny; Roger F. Woods (ASAP, 1991)

Design and test of a bit parallel 2nd order IIR filter structure. - O. C. McNally; William P. Marnane; John V. McCanny (ICASSP, 1991)

Design of a Highly Pipelined 2nd Order IIR Filter Chip. - O. C. McNally; John V. McCanny; Roger F. Woods (VLSI, 1991)