A Tool for Automatic Generation of BISTed and Transparent BISTed Rams. - O. Kebichi; Michael Nicolaidis (ICCD, 1992)

Aliasing-free Signature Analysis for RAM BIST. - Vyacheslav N. Yarmolik; Michael Nicolaidis; O. Kebichi (ITC, 1994)

Zero aliasing ROM BIST. - O. Kebichi; Vyacheslav N. Yarmolik; Michael Nicolaidis (J. Electron. Test., 1994)

Trade-offs in scan path and BIST implementations for RAMs. - Michael Nicolaidis; O. Kebichi; Vladimir Castro Alves (J. Electron. Test., 1994)

Area versus detection latency trade-offs in self-checking memory design. - O. Kebichi; Yervant Zorian; Michael Nicolaidis (ED&TC, 1995)

Exact Aliasing Computation for RAM BIST. - O. Kebichi; Michael Nicolaidis; Vyacheslav N. Yarmolik (ITC, 1995)