VLSI Implementation of Linear Algebraic Operations Based on the Orthogonal Fadddeev Algorithm. - Juri Kanevski; Oleg Maslennikov; Roman Wyrzykowski (PARCO, 1995)

Processor Array for Signal Computing and Numerical Applications. - Juri Kanevski; Oleg Maslennikov; Anatoli Sergyienko (Parcella, 1996)

Algorithm-Based Fault Tolerant Solution of Linear Systems on Processor Arrays. - Juri Kanevski; Oleg Maslennikov; Roman Wyrzykowski (Parcella, 1996)

A new orthogonal version of the Gauss-Jordan algorithm and its parallel implementation. - Roman Wyrzykowski; Juri Kanevski; Oleg Maslennikov (PDP, 1997)

A Method for Mapping DSP Algorithms into Application Specific Structures. - Anatoli Sergyienko; Juri Kanevski; Oleg Maslennikov; Roman Wyrzykowski (EUROMICRO, 1998)

Fault Tolerant QR-Decomposition Algorithm and Its Parallel Implementation. - Oleg Maslennikow; Juri Kaniewski; Roman Wyrzykowski (Euro-Par, 1998)

Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units. - Oleg Maslennikov (PPAM, 2001)

Implementation of Givens QR-Decomposition in FPGA. - Anatoli Sergyienko; Oleg Maslennikov (PPAM, 2001)

Current-mode digital gates and circuits: concept, design and verification. - Oleg Maslennikow; Piotr Pawlowski; Przemyslaw Soltan; Robert Berezowski (ICECS, 2002)

Configurable Microcontroller Array. - Oleg Maslennikov; Juri Shevtshenko; Anatoli Sergyienko (PARELEC, 2002)

Configurable Microprocessor Array for DSP Applications. - Oleg Maslennikow; Juri Shevtshenko; Anatoli Sergyienko (PPAM, 2003)

FPGA Implementation of the Conjugate Gradient Method. - Oleg Maslennikow; Volodymyr Lepekha; Anatoli Sergyienko (PPAM, 2005)

Mapping DSP Algorithms into FPGA. - Oleg Maslennikow; Anatoli Sergyienko (PARELEC, 2006)

Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. - Oleg Maslennikow; Volodymyr Lepekha; Anatoli Sergyienko; Adam Tomas; Roman Wyrzykowski (PPAM, 2007)

New conception and algorithm of allocation mapping for processor arrays implemented into multi-context FPGA devices. - Piotr Ratuszniak; Oleg Maslennikow (IMCSIT, 2009)

Application Specific Processors for the Autoregressive Signal Analysis. - Anatolij Sergiyenko; Oleg Maslennikow; Piotr Ratuszniak; Natalia Maslennikowa; Adam Tomas (PPAM (1), 2009)

Evolving dynamical networks with transient cluster activity. - Oleg Maslennikov; Vladimir I. Nekorkin (Commun. Nonlinear Sci. Numer. Simul., 2015)

Efficiency metrics for flocking with implicit leadership. - Oleg Maslennikov; Igor Komarov (FRUCT, 2016)

Dynamic Trust Management Framework for Robotic Multi-Agent Systems. - Igor A. Zikratov; Oleg Maslennikov; Ilya Lebedev; Aleksandr Ometov; Sergey Andreev 001 (NEW2AN, 2016)

Dynamics of spiking map-based neural networks in problems of supervised learning. - Mechislav M. Pugavko; Oleg Maslennikov; Vladimir I. Nekorkin (Commun. Nonlinear Sci. Numer. Simul., 2020)

Topological features of spike trains in recurrent spiking neural networks that are trained to generate spatiotemporal patterns. - Oleg Maslennikov; Matjaz Perc; Vladimir I. Nekorkin (Frontiers Comput. Neurosci., 2024)