PRUS - Processor Network for Digital Circuit Implementation. - Stanley Hyduke; Vladimir Hahanov; Volodymyr Obrizan; Olesya Guz (DSD, 2005)

Vector-logical diagnosis method for SOC functionalities. - Vladimir Hahanov; Olesya Guz; Natalya Kulbakova; Maxim Davydov (EWDTS, 2008)

Process models for analyzing associative data structures. - Vladimir Hahanov; Olesya Guz; Ngene Christopher Umerah; Vitaliy Olchovoy (EWDTS, 2010)

Coverage method for FPGA fault logic blocks by spares. - Vladimir Hahanov; Eugenia Litvinova; Wajeb Gharibi; Olesya Guz (EWDTS, 2010)

Verification and diagnosis of SoC HDL-code. - Vladimir Hahanov; Dong-Won Park; Olesya Guz; Aleksey Priymak (EWDTS, 2011)

Algebra-Logical Repair Method for FPGA Logic Blocks - Vladimir Hahanov; Eugenia Litvinova; Wajeb Gharibi; Olesya Guz (CoRR, 2011)

Brain-like infrastructure for embedded SoC diagnosis - Vladimir Hahanov; Wajeb Gharibi; Olesya Guz (CoRR, 2011)

Synthesis of qubit models for logic circuits. - Wajeb Gharibi; Sergey A. Zaychenko; Farid Dahiri; Yu. V. Hahanova; Olesya Guz; Christopher Umerah Ngene; Adiele Stanley (EWDTS, 2013)

Cloud traffic monitoring and control. - Vladimir Hahanov; Wajeb Gharibi; Baghdadi Ammar Awni Abbas; Svetlana Chumachenko; Olesya Guz; Eugenia Litvinova (IDAACS, 2013)