HLSIM - A New Hierarchical Logic Simulator and Netlist Converter. - David A. Zein; Oliver P. Engel; Gary S. Ditlow (DAC, 1992)

Algorithms for the design verification of bipolar array chips. - David A. Zein; Oliver P. Engel; Gary S. Ditlow (VTS, 1992)

HLSIM-a new hierarchical logic simulator in APL. - David A. Zein; Oliver P. Engel; Gary S. Ditlow (VTS, 1992)