Impact of a 10nm Ultra-Thin BOX (UTBOX) and Ground Plane on FDSOI devices for 32nm node and below. - Claire Fenouillet-Béranger; P. Perreau; S. Denorme; L. Tosti; François Andrieu; Olivier Weber; S. Barnola; C. Arvet; Y. Campidelli; Sébastien Haendler; R. Beneyton; C. Perrot; et al. (ESSCIRC, 2009)

Ultra-Thin Body and Buried Oxide (UTBB) FDSOI Technology with Low Variability and Power Management Capability for 22 nm Node and Below. - J. Mazurier; Olivier Weber; François Andrieu; Alain Toffoli; Olivier Thomas; Fabienne Allain; Jean-Philippe Noel; Marc Belleville; Olivier Faynot; T. Poiroux (J. Low Power Electron., 2012)

Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs. - François Andrieu; Mikaël Cassé; E. Baylac; P. Perreau; O. Nier; Denis Rideau; R. Berthelon; Franck Pourchon; A. Pofelski; Barbara De Salvo; C. Gallon; Vincent Mazzocchi; et al. (ESSDERC, 2014)

Variability of planar Ultra-Thin Body and Buried oxide (UTBB) FDSOI MOSFETs. - J. Mazurier; Olivier Weber; François Andrieu; Cyrille Le Royer; Olivier Faynot; Maud Vinet (ICICDT, 2014)

Effective work function engineering by sacrificial lanthanum diffusion on HfON-based 14 nm NFET devices. - Carlos Suarez-Segovia; Charles Leroux; Florian Domengie; Karen Dabertrand; Vincent Joseph; Giovanni Romano 003; Pierre Caubet; Stephane Zoll; Olivier Weber; Gérard Ghibaudo; Gilles Reimbold; Michel Haond (ESSDERC, 2015)

Static and dynamic power management in 14nm FDSOI technology. - Olivier Weber; Emmanuel Josse; J. Mazurier; Michel Haond (ICICDT, 2015)

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications. - Rossella Ranica; Nicolas Planes; Vincent Huard; Olivier Weber; Daniel Noblet; Damien Croain; Fabien Giner; Sylvie Naudet; P. Mergault; S. Ibars; A. Villaret; Maryline Parra; et al. (VLSI Circuits, 2016)

FDSOI vs FinFET: differentiating device features for ultra low power & IoT applications. - Olivier Weber (ICICDT, 2017)

28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications. - Franck Arnaud; Sébastien Haendler; Sylvain Clerc; Rossella Ranica; Anna Gandolfo; Olivier Weber (ESSDERC, 2019)

Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI. - Fabio Disegni; Roberto Annunziata; A. Molgora; G. Campardo; Paolo Cappelletti; P. Zuliani; P. Ferreira; A. Ventre; G. Castagna; Andreia Cathelin; Anna Gandolfo; F. Goller; et al. (VLSI Circuits, 2019)

Improving Ge-rich GST ePCM reliability through BEOL engineering. - Andrea Redaelli; Anna Gandolfo; Giulia Samanni; Enrico Gomiero; Elisa Petroni; Luca Scotti; Andrea Lippiello; Paolo Mattavelli; J. Jasse; D. Codegoni; A. Serafini; Rossella Ranica; et al. (ESSDERC, 2021)

16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update. - Fabio Disegni; A. Ventre; A. Molgora; Paolo Cappelletti; R. Badalamenti; P. Ferreira; G. Castagna; Andreia Cathelin; Anna Gandolfo; Andrea Redaelli; D. Manfrè; Alfonso Maurelli; et al. (VLSI Circuits, 2021)

Investigation of Random Telegraph Noise in Advanced Silicon-On-Insulator N-FETs: The Impact of Back Bias, Strain, and Hot Carrier Stress. - Xinze Li; Yuxuan Wu; Qiao Teng; Ying Sun; Xiao Gong; Guillaume Besnard; Christophe Maleville; Olivier Weber; Rui Zhang; Bing Chen; Dawei Gao; Ran Cheng (ICICDT, 2023)

An 18nm ePCM with BJT selector NVM design for advanced microcontroller applications. - Antonino Conte; Francesco Tomaiuolo; Marco Ruta; Andrea Redaelli; Franck Arnaud; Thomas Jouanneau; Christian Boccaccio; Olivier Weber (IMW, 2023)

Unlimited Bi-directional Back-Bias in FD-SOI Technology With New Dual Isolation Integration. - R. Berthelon; Olivier Weber; F. Ibars; B. Revel; C. Borowiak; J. C. Grenier; B. Dumont; S. Desmoulins; P. O. Sassoulas; P. Ferreira; S. Chouteau; S. Niel; et al. (VLSI Technology and Circuits, 2024)