Circuit optimizations to minimize energy in the global interconnect of a low-power-FPGA (abstract only). - Oluseyi A. Ayorinde; Benton H. Calhoun (FPGA, 2013)

Using island-style bi-directional intra-CLB routing in low-power FPGAs. - Oluseyi A. Ayorinde; He Qi; Yu Huang 015; Benton H. Calhoun (FPL, 2015)

Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs. - He Qi; Oluseyi A. Ayorinde; Yu Huang 015; Benton H. Calhoun (FPL, 2015)

An energy-efficient near/sub-threshold FPGA interconnect architecture using dynamic voltage scaling and power-gating. - He Qi; Oluseyi A. Ayorinde; Benton H. Calhoun (FPT, 2016)

FGC: A Tool-flow for Generating and Configuring Custom FPGAs(Abstract Only). - Oluseyi A. Ayorinde; He Qi; Benton H. Calhoun (FPGA, 2018)

A 1.02 μW Battery-Less, Continuous Sensing and Post-Processing SiP for Wearable Applications. - Christopher J. Lukas; Farah B. Yahya; Jacob Breiholz; Abhishek Roy 002; Xing Chen 004; Harsh N. Patel; Ningxi Liu; Avish Kosari; Shuo Li 008; Divya Akella Kamakshi; Oluseyi A. Ayorinde; David D. Wentzloff; et al. (IEEE Trans. Biomed. Circuits Syst., 2019)

FPNA: A Reconfigurable Accelerator for AI Inference at the Edge. - Peter Gadfort; Oluseyi A. Ayorinde (SoCC, 2021)