Ultra high speed Full Adders. - Keivan Navi; Reza Faghih Mirzaee; Mohammad Hossein Moaiyeri; Babak Mazloom Nezhad; Omid Hashemipour; K. Shams (IEICE Electron. Express, 2008)

A low voltage bootstrapped switch based on zero DC offset input voltage. - Alihosein Sepahvand; Omid Hashemipour (IEICE Electron. Express, 2008)

An efficient architecture for designing reverse converters based on a general three-moduli set. - Amir Sabbagh Molahosseini; Keivan Navi; Omid Hashemipour; Ali Jalali (J. Syst. Archit., 2008)

An energy efficient full adder cell for low voltage. - Keivan Navi; Mehrdad Maeen; Omid Hashemipour (IEICE Electron. Express, 2009)

Two new low-power Full Adders based on majority-not gates. - Keivan Navi; Mohammad Hossein Moaiyeri; Reza Faghih Mirzaee; Omid Hashemipour; Babak Mazloom Nezhad (Microelectron. J., 2009)

A simple time domain approach to noise analysis of switched capacitor circuits. - Mohammad Rashtian; Omid Hashemipour; Ali Mohammad Afshin Hemmatyar (IEICE Electron. Express, 2010)

A reliable full-swing low-distortion CMOS bootstrapped sampling switch. - Mohammad Reza Asgari; Seyyed Hossein Pishgar Komleh; Omid Hashemipour (ICECS, 2011)

A hardware-friendly arithmetic method and efficient implementations for designing digital fuzzy adders. - Keivan Navi; Akbar Doostaregan; Mohammad Hossein Moaiyeri; Omid Hashemipour (Fuzzy Sets Syst., 2011)

Body effect compensation of analog switches using variable voltage function. - Mohammad Reza Asgari; Omid Hashemipour (IEICE Electron. Express, 2011)

A New Switched opamp Approach for Improving the Operation of Auto-Reset Switched-capacitor Filters. - Mohammad Rashtian; Omid Hashemipour; Keivan Navi; Ali Jalali (J. Circuits Syst. Comput., 2011)

A high-speed current conveyor based current comparator. - Reza Chavoshisani; Omid Hashemipour (Microelectron. J., 2011)

High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology. - Mohammad Hossein Moaiyeri; Reza Chavoshisani; Ali Jalali; Keivan Navi; Omid Hashemipour (Circuits Syst. Signal Process., 2012)

Design and Evaluation of CNFET-Based Quaternary Circuits. - Mohammad Hossein Moaiyeri; Keivan Navi; Omid Hashemipour (Circuits Syst. Signal Process., 2012)

A low-variation on-resistance CMOS sampling switch for high-speed high-performance applications. - Mohammad Reza Asgari; Omid Hashemipour (IEICE Electron. Express, 2012)

Dramatically Low-Transistor-Count High-Speed Ternary Adders. - Reza Faghih Mirzaee; Mohammad Hossein Moaiyeri; Mojtaba Maleknejad; Keivan Navi; Omid Hashemipour (ISMVL, 2013)

A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits. - Mohammad Hossein Moaiyeri; Reza Faghih Mirzaee; Akbar Doostaregan; Keivan Navi; Omid Hashemipour (IET Comput. Digit. Tech., 2013)

Design, analysis, and implementation of partial product reduction phase by using wide m: 3 (4 ≤ m ≤ 10) compressors. - Shima Mehrabi; Reza Faghih Mirzaee; Sharareh Zamanzadeh; Keivan Navi; Omid Hashemipour (Int. J. High Perform. Syst. Archit., 2013)

Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic. - Reza Faghih Mirzaee; Tooraj Nikoubin; Keivan Navi; Omid Hashemipour (Microelectron. J., 2013)

A Flexible Design for Optimization of Hardware Architecture in Distributed Arithmetic based FIR Filters. - Fazel Sharifi; Saba Amanollahi; Mohammad Amin Taherkhani; Omid Hashemipour (CoRR, 2014)

New dynamic ternary minimum and maximum circuits with reduced switching activity and without any additional voltage sources. - Shirin Rezaie; Reza Faghih Mirzaee; Keivan Navi; Omid Hashemipour (Int. J. High Perform. Syst. Archit., 2015)

High Gain and High CMRR Two-Stage Folded Cascode OTA with Nested Miller Compensation. - Meysam Akbari; Omid Hashemipour (J. Circuits Syst. Comput., 2015)

Design of a 10-Bit High Performance Current-Steering DAC with a Novel Nested Decoder Based on Domino Logic. - Masoud Nazari; Leila Sharifi; Meysam Akbari; Omid Hashemipour (J. Circuits Syst. Comput., 2015)

Multi-Path Class AB Operational Amplifier with High Performance for SC Circuits. - Meysam Akbari; Omid Hashemipour (J. Circuits Syst. Comput., 2016)

Design and Analysis of an Ultra-Low-Power Second-Order Asynchronous Delta-Sigma Modulator. - Meysam Akbari; Omid Hashemipour; Farshad Moradi (Circuits Syst. Signal Process., 2017)

A 63-dB gain OTA operating in subthreshold with 20-nW power consumption. - Meysam Akbari; Omid Hashemipour (Int. J. Circuit Theory Appl., 2017)

Low Power Current Conveyor Based Continuous Time Sigma Delta Modulator. - Reza Chavoshisani; Omid Hashemipour (J. Low Power Electron., 2017)

A High Slew Rate CMOS OTA with Dynamic Current Boosting Paths. - Meysam Akbari; Omid Hashemipour; Farshad Moradi (ISCAS, 2018)

A novel design of a ternary coded decimal adder/subtractor using reversible ternary gates. - Mohammad Mehdi Panahi; Omid Hashemipour; Keivan Navi (Integr., 2018)

A Class-AB Bulk-Driven Amplifier with Enhanced Transconductance Using Quasi-Floating Gate Method. - Meysam Akbari; Omid Hashemipour (J. Circuits Syst. Comput., 2018)

Two-Dimensional Structure Compatible with DEM Methods Utilizing in DACs. - Mehdi Bandali; Omid Hashemipour (J. Circuits Syst. Comput., 2018)

An energy-efficient DAC switching algorithm based on charge recycling method for SAR ADCs. - Meysam Akbari; Omid Hashemipour; Fabian Khateb; Farshad Moradi (Microelectron. J., 2018)

Input Offset Estimation of CMOS Integrated Circuits in Weak Inversion. - Meysam Akbari; Omid Hashemipour; Farshad Moradi (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Energy-Efficient and Area-Efficient Switching Schemes for SAR ADCs. - Meysam Akbari; Masoud Nazari; Omid Hashemipour; Kye-Shin Lee (MWSCAS, 2019)

A charge sharing-based switching scheme for SAR ADCs. - Meysam Akbari; Omid Hashemipour; Masoud Nazari; Farshad Moradi (Int. J. Circuit Theory Appl., 2019)

An 8-Bit Ultra-Low-Power, Low-Voltage Current Steering DAC Utilizing a New Segmented Structure. - Mehdi Bandali; Alireza Hassanzadeh; Masoume Ghashghaie; Omid Hashemipour (J. Circuits Syst. Comput., 2019)

Mismatch error shaping of DAC unit elements in multibit ∆Σ modulators using a novel unified ADC/DAC. - Leila Sharifi; Omid Hashemipour (Turkish J. Electr. Eng. Comput. Sci., 2021)

Intersegment mismatch mitigation with multidimensional dynamic element matching digital to analog converters. - Bardia Babaei; Omid Hashemipour (Int. J. Circuit Theory Appl., 2021)

A Novel Rail-to-Rail Input Swing Threshold-Inverter Multi-Bit Quantizer Using Interpolation Technique for Sampled-Data Circuits. - Amir Hossein Miremadi; Omid Hashemipour (J. Circuits Syst. Comput., 2022)