Optimal (Bandpass) Continuous-Time Sigma-Delta Modulator. - Omid Shoaei; W. Martin Snelgrove (ISCAS, 1994)

A Multi-Feedback Design for LC Bandpass Delta-Sigma Modulators. - Omid Shoaei; W. Martin Snelgrove (ISCAS, 1995)

A CMOS mixed-signal 100 Mb/s receive architecture for fast Ethernet. - Ayal Shoval; Omid Shoaei; Kathleen O. Lee; Robert H. Leonowich (CICC, 1999)

Kalman-filtering timing recovery scheme for orthogonal frequency domain multiplexing (OFDM) systems. - Mohamad Hajirostam; Mohammad Ali Maddah-Ali; A. Haft-Baradaran; M. T. Kilani; Seid Mehdi Fakhraie; M. Sharif-Khani; Omid Shoaei (ICASSP, 2000)

A 1.4 GHz/2.7 V programmable frequency divider for DRRS standard in 0.6 μm CMOS process. - Hossein Zarei; Omid Shoaei; Sied Mehdi Fakhraie; M. M. Zakeri (ICECS, 2000)

A low-power gigabit Ethernet analog equalizer. - Pezhman Amini; Omid Shoaei (ISCAS (1), 2001)

A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS. - Babak Nejati; Omid Shoaei (ISCAS (1), 2001)

A low-power fully integrated Gaussian-MSK modulator based on the sigma-delta fractional-N frequency synthesis. - Hossein Zarei; Omid Shoaei; Seid Mehdi Fakhraie (ISCAS (4), 2001)

A six-order wideband bandpass sigma-delta modulator. - Hossein Shamsi; Omid Shoaei; Mohammad Yavari; M. Yaser Azizi (APCCAS (2), 2002)

A high-speed, current-steering digital-to-analog converter in 0.6-μm CMOS. - Mohammad Reza Hassanzadeh; Jafar Talebzadeh; Omid Shoaei (ICECS, 2002)

A 160-MS/s six-order wideband bandpass sigma-delta modulator. - Hossein Shamsi; Omid Shoaei (ICECS, 2002)

A 10-bit 150-MS/s, parallel pipeline A/D converter in 0.6-µm CMOS. - Jafar Talebzadeh; Mohammad Reza Hassanzadeh; Mohammad Yavari; Omid Shoaei (ISCAS (3), 2002)

An analytical approach to the estimation of dynamic non-linearity parameters in pipeline A/D converters. - Mohammad Taherzadeh-Sani; Reza Lotfi; Omid Shoaei (ESSCIRC, 2003)

Systematic Design for Power Minimization of Pipelined Analog-to-Digital Converters. - Reza Lotfi; Mohammad Taherzadeh-Sani; M. Yaser Azizi; Omid Shoaei (ICCAD, 2003)

A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs. - Mohammad Taherzadeh-Sani; Reza Lotfi; Omid Shoaei (ICCAD, 2003)

Topology selection for low-voltage low-power wireless receivers. - Mohammad Farazian; Omid Shoaei; Mohammad Yavari (ICECS, 2003)

A 1.5-V 12-bit 75M-samples/s fully-differential low-power sample-and-hold amplifier in 0.25-μm CMOS. - Reza Lotfi; Mohammad Taherzadeh-Sani; Omid Shoaei (ICECS, 2003)

A novel frequency compensation technique for two-stage CMOS operational amplifiers. - Mohammad Taherzadeh-Sani; Reza Lotfi; Omid Shoaei (ICECS, 2003)

An analytical approach to the estimation of the spurious-free dynamic range in pipeline A/D converters. - Mohammad Taherzadeh-Sani; Reza Lotfi; Omid Shoaei (ICECS, 2003)

A new compensation technique for two-stage CMOS operational transconductance amplifiers. - Mohammad Yavari; Hashem Zare-Hoseini; M. Farazian; Omid Shoaei (ICECS, 2003)

A very low-noise low-power integrator for high-resolution ΔΣ modulators. - Hashem Zare-Hoseini; Mohammad Yavari; Omid Shoaei (ICECS, 2003)

A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25µm CMOS. - Mohammad Yavari; Omid Shoaei; Ali Afzali-Kusha (ISCAS (1), 2003)

A low-power design methodology for high-resolution pipelined analog-to-digital converters. - Reza Lotfi; Mohammad Taherzadeh-Sani; M. Yaser Azizi; Omid Shoaei (ISLPED, 2003)

Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications. - Mohammad Yavari; Omid Shoaei (ISLPED, 2003)

Low-power design techniques for low-voltage fast-settling operational amplifiers in switched-capacitor applications. - Reza Lotfi; Mohammad Taherzadeh-Sani; M. Yaser Azizi; Omid Shoaei (Integr., 2003)

On the parasitic-sensitivity of switched-capacitor summing-integrator structures for ΣΔ modulators. - Shahin Jafarabadi-Ashtiani; Omid Shoaei; S. M. Rezaul Hasan; Azam Jannesari (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

Systematic Design for Optimization of High-Resolution Pipelined ADCs. - Mohammad Taherzadeh-Sani; Reza Lotfi; Omid Shoaei (DATE, 2004)

A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D convereter in 0.25-µm CMOS [convereter read converter]. - Reza Lotfi; Mohammad Taherzadeh-Sani; Omid Shoaei (ISCAS (1), 2004)

An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers. - Nima Maghari; Mohammad Yavari; Omid Shoaei (ISCAS (1), 2004)

A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter. - Babak Nejati; Omid Shoaei (ISCAS (1), 2004)

A pseudo-class-AB telescopic-cascode operational amplifier. - Mohammad Taherzadeh-Sani; Reza Lotfi; Omid Shoaei (ISCAS (1), 2004)

Low-voltage sigma-delta modulator topologies for broadband applications. - Mohammad Yavari; Omid Shoaei (ISCAS (1), 2004)

Return to-zero feedback insertion in a continuous time Delta-Sigma modulator for excess loop delay compensation. - Hossein Shamsi; Omid Shoaei (IEICE Electron. Express, 2004)

A novel fully-differential class AB folded-cascode OTA. - Mohammad Yavari; Omid Shoaei (IEICE Electron. Express, 2004)

Systematic design of the pipelined analog-to-digital converter with radix<2. - Babak Nejati; Omid Shoaei (Microelectron. J., 2004)

A two-stage genetic algorithm method for optimization the Sigma-Delta modulators. - Ali Zahabi; Omid Shoaei; Yarallah Koolivand; Parviz Jabedar Maralani (ASP-DAC, 2005)

Power spectral density estimation of the clock jitter in a continuous time Delta Sigma modulator with non return to-zero DAC waveform. - Hossein Shamsi; Omid Shoaei; Roghayeh Doost (ICECS, 2005)

A novel fully-differential class AB folded-cascode OTA for switched-capacitor applications. - Mohammad Yavari; Omid Shoaei (ICECS, 2005)

A new technique for design CMOS LNA for multi-standard receivers. - Yarallah Koolivand; Omid Shoaei; Ali Zahabi; Hossein Shamsi; Parviz Jabedar Maralani (ISCAS (4), 2005)

Power consumption issues in high-speed high-resolution pipelined A/D converters. - Reza Lotfi; Mohammad Taherzadeh-Sani; Omid Shoaei (ISCAS (5), 2005)

A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support. - Nima Maghari; Omid Shoaei (ISCAS (5), 2005)

High-order single-loop double-sampling sigma-delta modulator topologies for broadband applications. - Mohammad Yavari; Omid Shoaei (ISCAS (6), 2005)

Hybrid cascode compensation for two-stage CMOS operational amplifiers. - Mohammad Yavari; Omid Shoaei; Francesco Svelto (ISCAS (2), 2005)

A low-power ΣΔ modulator with low capacitor spread for multi-standard receiver applications. - Ali Zahabi; Omid Shoaei; Yarallah Koolivand; Parviz Jabedar Maralani (ISCAS (4), 2005)

A new multiply-by-two gain-stage with enhanced immunity to capacitor-mismatch. - Hashem Zare-Hoseini; Omid Shoaei; Izzet Kale (ISCAS (2), 2005)

Design of a Band-Pass Pseudo-2-Path Switched Capacitor Ladder Filter. - Ali Zahabi; Omid Shoaei; Yarallah Koolivand (ISQED, 2005)

A complete analysis of noise in inductively source degenerated CMOS LNA's. - Yarallah Koolivand; Omid Shoaei; Ali Zahabi; Parviz Jabedar Maralani (IEICE Electron. Express, 2005)

Efficient double-sampled cascaded ΣΔ modulator topologies for low OSRs. - Mohammad Yavari; Omid Shoaei (IEICE Electron. Express, 2005)

A 2/5mW CMOS Delta Sigma modulator employed in an improved GSM/UMTS receiver structure. - Ali Zahabi; Omid Shoaei; Yarallah Koolivand; Parviz Jabedar Maralani (IEICE Electron. Express, 2005)

A Simplified Illustration of Arbitrary DAC Waveform Effects in Continuous Time Delta-Sigma Modulators. - Hossein Shamsi; Omid Shoaei (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

A New Method for Elimination of the Clock Jitter Effects in Continuous Time Delta-Sigma Modulators. - Hossein Shamsi; Omid Shoaei; Roghayeh Doost (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

An accurate analysis of slew rate for two-stage CMOS opamps. - Mohammad Yavari; Nima Maghari; Omid Shoaei (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

Modeling of switched-capacitor delta-sigma Modulators in SIMULINK. - Hashem Zare-Hoseini; Izzet Kale; Omid Shoaei (IEEE Trans. Instrum. Meas., 2005)

Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms. - Hossein Shamsi; Omid Shoaei (APCCAS, 2006)

A New Approach for DAC Non-linearity Compensation in Continuous Time Delta Sigma Modulators. - Hossein Shamsi; Omid Shoaei (APCCAS, 2006)

Experimental Evaluation of Different Realizations of Recursive CIC Filters. - S. M. Mortazavi Zanjani; Somayyeh Rahimian Omam; Seid Mehdi Fakhraie; Omid Shoaei (CCECE, 2006)

Arbitrary design of high order noise transfer function for a novel class of reduced-sample-rate sigma-delta-pipeline ADCs. - Vahid Majidzadeh; Omid Shoaei (DATE, 2006)

Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation. - Mohammad Yavari; Omid Shoaei; Ángel Rodríguez-Vázquez (DATE, 2006)

Double-sampling single-loop sigma-delta modulator topologies for broadband applications. - Mohammad Yavari; Omid Shoaei; Ángel Rodríguez-Vázquez (DATE, 2006)

Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series. - Yarallah Koolivand; Omid Shoaei; Ali Fotowat-Ahmady; Ali Zahabi; Parviz Jabedar Maralani (ACM Great Lakes Symposium on VLSI, 2006)

A power optimized design methodology for low-distortion sigma-delta-pipeline ADCs. - Vahid Majidzadeh; Omid Shoaei (ACM Great Lakes Symposium on VLSI, 2006)

Implementation of Multiplier Block with Reduced Adder Cost. - Somayyeh Rahimian Omam; S. M. Mortazavi Zanjani; Sied Mehdi Fakhraie; Omid Shoaei (ICECS, 2006)

A novel structure for the design of 2-1-1 cascaded continuous time delta sigma modulators. - Hossein Shamsi; Omid Shoaei (ISCAS, 2006)

Digital background calibration of pipeline ADC with open-loop gain stage. - B. Tavassoli; Omid Shoaei (ISCAS, 2006)

A low power, transverse analog FIR filter for feed forward equalization of gigabit Ethernet. - Mohammad B. Vahidfar; Omid Shoaei; M. Fardis (ISCAS, 2006)

Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios. - Mohammad Yavari; Omid Shoaei; Ángel Rodríguez-Vázquez (ISCAS, 2006)

A new structure for capacitor-mismatch-insensitive multiply-by-two amplification. - Hashem Zare-Hoseini; Omid Shoaei; Izzet Kale (ISCAS, 2006)

Minimizing the adder cost in multiple constant multipliers. - Somayyeh Rahimian Omam; Seid Mehdi Fakhraie; Omid Shoaei (IEICE Electron. Express, 2006)

A Reduced-Sample-Rate Sigma-Delta-Pipeline ADC Architecture for High-Speed High-Resolution Applications. - Vahid Majidzadeh; Omid Shoaei (IEICE Trans. Electron., 2006)

A New Infrastructure for Digital Pre-Filtering in Multi-bit Continuous Time Delta Sigma Modulators. - Hossein Shamsi; Omid Shoaei (IEICE Trans. Electron., 2006)

Analysis of the Clock Jitter Effects in a Time Invariant Model of Continuous Time Delta Sigma Modulators. - Hossein Shamsi; Omid Shoaei; Roghayeh Doost (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

Double-sampling single-loop ΣΔ modulator topologies for broad-band applications. - Mohammad Yavari; Omid Shoaei; Ángel Rodríguez-Vázquez (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A new technique for high IIP2 reconfigurable CMOS mixer in multi-standard receivers. - Mohammad B. Vahidfar; Omid Shoaei (IEICE Electron. Express, 2007)

A new reconfigurable LNA enhanced by programmable load and capacitive feedback for multi-standard applications. - Mohammad B. Vahidfar; Omid Shoaei (IEICE Electron. Express, 2007)

A New Inductor-Less IP2 Enhancement Technique for CMOS Multi-Standard Mixer. - Mohammad B. Vahidfar; Omid Shoaei (IEICE Trans. Electron., 2007)

A New IIP2 Enhancement Technique for CMOS Down-Converter Mixers. - Mohammad B. Vahidfar; Omid Shoaei (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

New technique in design of active rf cmos mixers for low flicker noise and high conversion gain. - Yarallah Koolivand; Seyed Morteza Alavi; Omid Shoaei (ACM Great Lakes Symposium on VLSI, 2008)

A 0.9V 10-bit 100 MS/s switched-RC pipelined ADC without using a front-end S/H in 90nm CMOS. - Sedigheh Hashemi; Omid Shoaei (ISCAS, 2008)

A CMOS high IIP2 mixer for multi-standard receivers. - Mohammad B. Vahidfar; Omid Shoaei (ISCAS, 2008)

An IIP2 calibration technique for CMOS multi-standard mixers. - Mohammad B. Vahidfar; Omid Shoaei (ISCAS, 2008)

A low-voltage low-power highly-linear switched-RC MDAC for pipelined ADCs. - Sedigheh Hashemi; Omid Shoaei (IEICE Electron. Express, 2008)

An IIP2 Calibration Technique for Zero-IF Multi Band down Converter Mixer. - Mohammad B. Vahidfar; Omid Shoaei (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

A Novel Low Power 1 GS/s S&H Architecture With Improved Analog Bandwidth. - Arashk Norouzpour-Shirazi; S. Arash Mirhaj; Shahin Jafarabadi-Ashtiani; Omid Shoaei (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A High IIP2 Mixer Enhanced by a New Calibration Technique for Zero-IF Receivers. - Mohammad B. Vahidfar; Omid Shoaei (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Low voltage low power techniques in design of zero IF CMOS receivers. - Yarallah Koolivand; Mohammad Yavari; Omid Shoaei; Ali Fotowat-Ahmady (ICECS, 2009)

Linearity improvement of open-loop NMOS source-follower sample and hold circuits. - Arashk Norouzpour-Shirazi; S. Arash Mirhaj; Shahin Jafarabadi-Ashtiani; Omid Shoaei (IET Circuits Devices Syst., 2011)

High speed sample and hold design using closed-loop pole-zero cancelation. - S. Arash Mirhaj; Arashk Norouzpour-Shirazi; Shahin Jafarabadi-Ashtiani; Omid Shoaei (Microelectron. J., 2011)

A simple and precise charge balancing method for voltage mode stimulation. - Reza Ranjandish; Omid Shoaei (BioCAS, 2014)

A double-carrier wireless power and data telemetry for implantable biomedical systems. - Mohammad Najjarzadegan; Iman Ghotbi; S. Jafarabadi Ashtiani; Omid Shoaei (ISCAS, 2016)

A Power optimized switched-capacitor based approach in voltage-controlled cardiac stimulation. - Ali Esmailiyan; Iman Ghotbi; Omid Shoaei (MWSCAS, 2016)

Extended coupling-range wireless power transfer using 0× / 4× resonant regulating rectifier. - Iman Ghotbi; Ali Esmailiyan; Shahin Jafarabadi-Ashtiani; Omid Shoaei (MWSCAS, 2016)

A wireless pulsed-current battery charger for implantable biomedical stimulators. - Iman Ghotbi; Mohammad Najjarzadegan; Ali Esmailiyan; Shahin Jafarabadi-Ashtiani; Omid Shoaei (MWSCAS, 2016)

A charge-pump based multi-mode stimuli generator for cardiac pacemaking. - Ali Esmailiyan; Ali Shaker; Iman Ghotbi; Omid Shoaei (NEWCAS, 2016)

An aging-aware model for the leakage power of nanoscaled digital integrated circuits in IoT era. - Amirhossein Moshrefi; Hossein Aghababa; Omid Shoaei (ICECS, 2017)

Two-electrode impedance-sensing cardiac rhythm monitor for charge-aware shock delivery in cardiac arrest. - Reza Pazhouhandeh; Omid Shoaei; Roman Genov (ISCAS, 2017)

Knock signal denoising employing a new time domain method. - Amirhossein Moshrefi; Hossein Aghababa; Omid Shoaei (NEWCAS, 2017)

A Fully Fail-Safe Capacitive-Based Charge Metering Method for Active Charge Balancing in Deep Brain Stimulation. - Reza Ranjandish; Omid Shoaei; Alexandre Schmid (PRIME, 2018)

Distributed-element modelling for spiral resonators used in wireless power transfer. - Mohammad Najjarzadegan; Iman Ghotbi; Pouyan Bassirian; S. Jafarabadi Ashtiani; Omid Shoaei; Mahmoud Shahabadi (Int. J. Circuit Theory Appl., 2018)

Statistical estimation of delay in nano-scale CMOS circuits using Burr Distribution. - Amirhossein Moshrefi; Hossein Aghababa; Omid Shoaei (Microelectron. J., 2018)

A 0.5 μA/Channel front-end for implantable and external ambulatory ECG recorders. - Yasser Rezaeiyan; Milad Zamani; Omid Shoaei; Wouter A. Serdijn (Microelectron. J., 2018)

Mixed-Signal IC With Pulse Width Modulation Wireless Telemetry for Implantable Cardiac Pacemakers in 0.18-μm CMOS. - Yasser Rezaeiyan; Milad Zamani; Omid Shoaei; Wouter A. Serdijn (IEEE Trans. Biomed. Circuits Syst., 2018)

A 1.55 μW Bio-Impedance Measurement System for Implantable Cardiac Pacemakers in 0.18 μm CMOS. - Milad Zamani; Yasser Rezaeiyan; Omid Shoaei; Wouter A. Serdijn (IEEE Trans. Biomed. Circuits Syst., 2018)

Enhanced Power-Delivered-to-Load Through Planar Multiple-Harmonic Wireless Power Transmission. - Iman Ghotbi; Mohammad Najjarzadegan; Hossein Sarfaraz; Shahin Jafarabadi-Ashtiani; Omid Shoaei (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

ADC-Assisted Random Sampler Architecture for Efficient Sparse Signal Acquisition. - Mehdi Safarpour; Reza Inanlou; Mostafa Charmi; Omid Shoaei; Olli Silvén (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A Reconfigurable Dual-Mode Tracking SAR ADC without Analog Subtraction. - Mehdi Safarpour; Reza Inanlou; Olli Silvén; Timo Rahkonen; Omid Shoaei (SPA, 2019)

A comprehensive circuit model for evaluating the response of silicon photomultipliers in continuous wave light regime. - Amir Reza Siminfar; Omid Shoaei (Int. J. Circuit Theory Appl., 2019)

An asynchronous pulse width modulator for DC-DC buck converter. - Reza Inanlou; Omid Shoaei; Mohsen Tamaddon (Int. J. Circuit Theory Appl., 2020)

A 9-Bit 70-MS/s Two-Stage SAR ADC With Passive Residue Transfer. - Alireza Mosalmani; Mehdi Khoee; Omid Shoaei (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A 7.2µW Magnitude/Phase Bio-impedance Measurement Front-End with PWM Output in 0.18µm CMOS. - Milad Zamani; Yasser Rezaeiyan; Omid Shoaei; Farshad Moradi (NorCAS, 2021)

A Class-E Power and Data Transmitter With Improved Data Rate to Carrier Frequency Ratio for Medical Implants. - Khashayar Dehghan; Omid Shoaei; Shahin Jafarabadi-Ashtiani (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Fast Background Calibration of Linear and Non-Linear Errors in Pipeline Analog-to-Digital Converters. - Mohsen Jiani; Omid Shoaei (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 69MHz-Bandwidth 40V/μs-Slew-rate 3nV/√Hz-Noises 4.5μV-Offset Chopper Operational Amplifier. - Yarallah Koolivand; Yasser Rezayean; Milad Zamani; Meysam Akbari; Omid Shoaei; Kea-Tiong Tang; Farshad Moradi (CICC, 2023)

Multipolar Stimulator for DBS Application with Concurrent Imbalance Compensation. - Reza Shokri; Yarallah Koolivand; Omid Shoaei; Orazio Aiello; Daniele D. Caviglia (ICECS, 2023)

A 4.5 $ mu$W Miniaturized 3-Channel Wireless Intra-Cardiac Acquisition System. - Yasser Rezaeiyan; Yarallah Koolivand; Milad Zamani; Omid Shoaei; Meysam Akbari; Farshad Moradi; Kea-Tiong Tang (IEEE Trans. Biomed. Circuits Syst., 2023)

A compact bipolar high-voltage pulser with a novel transistor gate-source protection scheme for ultrasound imaging applications. - Reza Ehsanipour; Omid Shoaei (Int. J. Circuit Theory Appl., 2024)

A 69MHz-Bandwidth 40V/μ s-Slew-Rate 3n V/√Hz-Noise 4.5 μ V-Offset Chopper Operational Amplifier. - Yarallah Koolivand; Yasser Rezaeiyan; Milad Zamani; Meysam Akbari; Omid Shoaei; Kea-Tiong Tang; Farshad Moradi (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications. - Reza Shokri; Yarallah Koolivand; Omid Shoaei; Daniele D. Caviglia; Orazio Aiello (Sensors, 2024)

Multipolar Stimulator for Deep Brain Stimulation With Suppression of Stimulation-Induced Common-Mode Artifacts. - Reza Shokri; Yarallah Koolivand; Omid Shoaei; Daniele D. Caviglia; Orazio Aiello (IEEE Access, 2025)