Assertive Dynamic Power Management (AsDPM) Strategy for Globally Scheduled RT Multiprocessor Systems. - Muhammad Khurram Bhatti; Muhammad Farooq 008; Cécile Belleudy; Michel Auguin; Ons Mbarek (PATMOS, 2009)

A Methodology for Power-Aware Transaction-Level Models of Systems-on-Chip Using UPF Standard Concepts. - Ons Mbarek; Alain Pegatoquet; Michel Auguin (PATMOS, 2011)

Black-box and white-box early power intent simulation and verification: Two novel approaches. - Ons Mbarek; Alain Pegatoquet; Michel Auguin (DASIP, 2012)

Using model driven engineering to reliably accelerate early Low Power Intent Exploration for a system-on-chip design. - Ons Mbarek; Amani Khecharem; Alain Pegatoquet; Michel Auguin (SAC, 2012)

Using unified power format standard concepts for power-aware design and verification of systems-onchip at transaction level. - Ons Mbarek; Alain Pegatoquet; Michel Auguin (IET Circuits Devices Syst., 2012)

Power-Aware Wrappers for Transaction-Level Virtual Prototypes: A Black Box Based Approach. - Ons Mbarek; Alain Pegatoquet; Michel Auguin; Houssem Eddine Fathallah (VLSI Design, 2013)

Power domain management interface: flexible protocol interface for transaction-level power domain management. - Ons Mbarek; Alain Pegatoquet; Michel Auguin (IET Comput. Digit. Tech., 2013)

An electronic system level modeling approach for the design and verification of low-power systems-on chip. (Une approche de modélisation au niveau système pour la conception et la vérification de systèmes sur puce à faible consommation). - Ons Mbarek (2013)