Susceptibility to EMI of ICs for power MOS monitoring. - Orazio Aiello (2012)

A new MagFET-based integrated current sensor highly immune to EMI. - Orazio Aiello; Franco Fiori (Microelectron. Reliab., 2013)

A New Mirroring Circuit for Power MOS Current Sensing Highly Immune to EMI. - Orazio Aiello; Franco Fiori (Sensors, 2013)

Fully Synthesizable, Rail-to-Rail Dynamic Voltage Comparator for Operation down to 0.3 V. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (ISCAS, 2018)

A Sub-Leakage PW-Power HZ-Range Relaxation Oscillator Operating with 0.3V-1.8V Unregulated Supply. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (VLSI Circuits, 2018)

Design of Relaxation Digital-to-Analog Converters for Internet of Things Applications in 40nm CMOS. - Roberto Rubino; Paolo Stefano Crovetti; Orazio Aiello (APCCAS, 2019)

Minimum-Effort Design of Ultra-Low Power Interfaces for the Internet of Things. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (ICECS, 2019)

Fully-Synthesizable Current-Input ADCs for Ultra-Low Area and Minimal Design Effort. - Orazio Aiello; Paolo Crovetti; Ayushparth Sharma; Massimo Alioto (ICECS, 2019)

Wake-Up Oscillators with pW Power Consumption in Dynamic Leakage Suppression Logic. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (ISCAS, 2019)

A 300mV-Supply Standard-Cell-Based OTA with Digital PWM Offset Calibration. - Pedro Toledo; Orazio Aiello; Paolo Stefano Crovetti (NORCAS, 2019)

Standard Cell-Based Ultra-Compact DACs in 40-nm CMOS. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (IEEE Access, 2019)

A pW-Power Hz-Range Oscillator Operating With a 0.3-1.8-V Unregulated Supply. - Orazio Aiello; Paolo Crovetti; Longyang Lin; Massimo Alioto (IEEE J. Solid State Circuits, 2019)

Fully Synthesizable Low-Area Digital-to-Analog Converter With Graceful Degradation and Dynamic Power-Resolution Scaling. - Orazio Aiello; Paolo Stefano Crovetti; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Fully Synthesizable Low-Area Analogue-to-Digital Converters With Minimal Design Effort Based on the Dyadic Digital Pulse Modulation. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (IEEE Access, 2020)

Fully-differential inverter-based OTA with improved composite transistors. - Luis Henrique Rodovalho; Orazio Aiello; Cesar Ramos Rodrigues (APCCAS, 2021)

An inverter-based OTA using improved composite transistors and bulk-driven common-mode rejection. - Luis Henrique Rodovalho; Cesar Ramos Rodrigues; Orazio Aiello (APCCAS, 2021)

Capacitance-to-Digital Converter for Operation Under Uncertain Harvested Voltage down to 0.3V with No Trimming, Reference and Voltage Regulation. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (ISSCC, 2021)

Temperature Characterization of a Fully-synthesizable Rail-to-Rail Dynamic Voltage Comparator operating down to 0.15-V : (Invited paper). - Orazio Aiello; Pedro Toledo (NEWCAS, 2021)

CMOS inverter linearization technique with active source degeneration. - Luis Henrique Rodovalho; Cesar Ramos Rodrigues; Orazio Aiello (NorCAS, 2021)

A Two-Stage Single-Ended OTA with Improved Composite Transistors. - Luis Henrique Rodovalho; Cesar Ramos Rodrigues; Orazio Aiello (NorCAS, 2021)

Design of Digital OTAs With Operation Down to 0.3 V and nW Power for Direct Harvesting. - Pedro Toledo; Paolo Crovetti; Orazio Aiello; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Rail-to-Rail Dynamic Voltage Comparator Scalable Down to pW-Range Power and 0.15-V Supply. - Orazio Aiello; Paolo Crovetti; Pedro Toledo; Massimo Alioto (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 300mV-Supply, Sub-nW-Power Digital-Based Operational Transconductance Amplifier. - Pedro Toledo; Paolo Crovetti; Hamilton Klimach; Sergio Bampi; Orazio Aiello; Massimo Alioto (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

DDPMnet: All-Digital Pulse Density-Based DNN Architecture with 228 Gate Equivalents/MAC Unit, 28-TOPS/W and 1.5-TOPS/mm2 in 40nm. - Animesh Gupta; Viveka Konandur Rajanna; Thoithoi Salam; Saurabh Jain; Orazio Aiello; Paolo Crovetti; Massimo Alioto (CICC, 2022)

Capacitance-Based Voltage Regulation- and Reference-Free Temperature-to-Digital Converter down to 0.3 V and 2.5 nW for Direct Harvesting. - Orazio Aiello; Massimo Alioto (ESSCIRC, 2022)

Conversion Time-Power Tradeoff in Capacitance-to-Digital Converters with Dual-Mode Logic. - Orazio Aiello; Paolo Crovetti; Massimo Alioto (SBCCI, 2022)

Improving Energy Harvesting Performance of the PVDF Films by adding Nano ZnO. - Rawad Hamdan; Ayham Alyosef; Orazio Aiello; Daniele D. Caviglia (ACTEA, 2023)

Multipolar Stimulator for DBS Application with Concurrent Imbalance Compensation. - Reza Shokri; Yarallah Koolivand; Omid Shoaei; Orazio Aiello; Daniele D. Caviglia (ICECS, 2023)

A 30 kHz - 3 GHz Clock Duty-Cycle Corrector Circuit for CMOS Integrated Digital Electronic Systems. - Guido Di Patrizio Stanchieri; Andrea De Marcellis; Marco Faccio; Elia Palange; Orazio Aiello (MIXDES, 2023)

38.4-pW, 0.14-mm2 Body-Driven Temperature-to-Digital Converter and Voltage Reference with 0.6-1.6-V Unregulated Supply for Battery-Less Systems. - Luigi Fassio; Orazio Aiello; Massimo Alioto (VLSI Technology and Circuits, 2023)

Mitigating Cyber Attacks in LoRaWAN via Lightweight Secure Key Management Scheme. - Junaid Qadir 003; Ismail Butun; Paolo Gastaldo; Orazio Aiello; Daniele D. Caviglia (IEEE Access, 2023)

Capacitance-to-Digital Converter for Harvested Systems Down to 0.3 V With No Trimming, Reference, and Voltage Regulation. - Orazio Aiello; Paolo Stefano Crovetti; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Monitoring the Air Quality in an HVAC System via an Energy Harvesting Device. - Corrado Boragno; Orazio Aiello; Daniele D. Caviglia (Sensors, 2023)

Fully Synthesizable Dynamic Voltage Comparator across technology nodes and scaled supply voltages. - Duy-Hieu Bui; Duc-Manh Tran; Daniele D. Caviglia; Orazio Aiello (ISCAS, 2024)

0.5V 32nW Inverter-Based Gm-C Filter for Bio-Signal Processing. - Ali Namdari; Orazio Aiello; Daniele D. Caviglia (ISCAS, 2024)

Inverter-Based Amplifier with Active Frequency Compensation and Adaptive Voltage Scaling. - Luis Henrique Rodovalho; Orazio Aiello (ISCAS, 2024)

A 0.4 V 180 nm CMOS Sub-μW Ultra-Compact and Low-Effort Design PWM-Based ADC. - Guido Di Patrizio Stanchieri; Orazio Aiello; Andrea De Marcellis (ISCAS, 2024)

Highly Linear, Digital OTA With Modified Input Stage. - Reza Shokri; Daniele D. Caviglia; Orazio Aiello (PRIME, 2024)

A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications. - Reza Shokri; Yarallah Koolivand; Omid Shoaei; Daniele D. Caviglia; Orazio Aiello (Sensors, 2024)

Live Demonstration: Sea Wave Energy Harvester for Environmental Monitoring Buoys. - Filippo Nicora; Orazio Aiello; Corrado Boragno; Daniele D. Caviglia; Alessandro Lo Schiavo (ISCAS, 2025)

Live Demonstration: Energy Autonomous Wireless Sensor Node for Oxygen Monitoring with LoRa Connectivity. - Roberto La Rosa; Orazio Aiello (ISCAS, 2025)

An Inverter-Based Difference Differential Amplifier with Active Frequency Compensation. - Luis Henrique Rodovalho; Orazio Aiello (LASCAS, 2025)

Sustainable, Battery-Free Wireless Sensor Node with LoRaWAN Connectivity in ABP and OTAA Activation Modes. - Roberto La Rosa; Pietro Firpo; Orazio Aiello (LASCAS, 2025)

A Novel 0.62 nW Inverter Based Digital-OTA. - Riccardo Della Sala; Orazio Aiello; Giuseppe Scotti (LASCAS, 2025)

A 0.3V, 2.34nW and 56db Gain Bulk-Driven OTA Exploiting Cascode Output Stages and Enhanced Current Mirrors. - Riccardo Della Sala; Orazio Aiello; Giuseppe Scotti (LASCAS, 2025)