Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs. - Zhi Liang Wang; Osami Wada; Takashi Harada; Takahiro Yaguchi; Yoshitaka Toyota; Ryuji Koga (IEICE Trans. Commun., 2005)

De-Embedding Technique for the Extraction of Parasitic and Stray Capacitances from 1-Port Measurements. - Umberto Paoletti; Osami Wada (IEICE Trans. Commun., 2007)

Indirect extension of the image theory to partial inductance calculations. - Umberto Paoletti; Takashi Hisakado; Osami Wada (IEICE Electron. Express, 2008)

Increase of Common-Mode Radiation due to Guard Trace Voltage and Determination of Effective Via-Location. - Tohlu Matsushima; Tetsushi Watanabe; Yoshitaka Toyota; Ryuji Koga; Osami Wada (IEICE Trans. Commun., 2009)

Evaluation of EMI Reduction Effect of Guard Traces Based on Imbalance Difference Model. - Tohlu Matsushima; Tetsushi Watanabe; Yoshitaka Toyota; Ryuji Koga; Osami Wada (IEICE Trans. Commun., 2009)

Importance and Limitations of Modeling Parasitic Capacitance between Package and PCB for Power Bus Noise and Radiation. - Umberto Paoletti; Takashi Hisakado; Osami Wada (IEICE Trans. Commun., 2009)

Calculation of Common-Mode Radiation from Single-Channel Differential Signaling System Using Imbalance Difference Model. - Tohlu Matsushima; Tetsushi Watanabe; Yoshitaka Toyota; Ryuji Koga; Osami Wada (IEICE Trans. Commun., 2010)

Suppression of Guard-Trace Resonance by Matched Termination for Reducing Common-Mode Radiation. - Tetsushi Watanabe; Tohlu Matsushima; Yoshitaka Toyota; Osami Wada; Ryuji Koga (IEICE Trans. Commun., 2010)

Impedance balance control for suppression of fluctuation on ground voltage in LSI package. - Masaaki Maeda; Tohlu Matsushima; Osami Wada (EMC Compo, 2013)

Improvement of reproducibility of DPI method to quantify RF conducted immunity of LDO regulator. - Tohlu Matsushima; Nobuaki Ikehara; Takashi Hisakado; Osami Wada (EMC Compo, 2013)

Substrate noise reduction based on impedance balance using tunable resistances. - Atsushi Nakamura; Masaaki Maeda; Tohlu Matsushima; Osami Wada (EMC Compo, 2013)

Chair's welcome. - Osami Wada (EMC Compo, 2013)

Relation between internal terminal voltage and immunity behavior of LDO regulator circuits. - Hidetoshi Miyahara; Nobuaki Ikehara; Tohlu Matsushima; Takashi Hisakado; Osami Wada (EMC Compo, 2015)

Modeling of Bulk Current Injection Setup for Automotive Immunity Test Using Electromagnetic Analysis. - Yosuke Kondo; Masato Izumichi; Kei Shimakura; Osami Wada (IEICE Trans. Commun., 2015)

Foreword. - Osami Wada (IEICE Trans. Commun., 2015)

Connector Model for Use in Common-Mode Antenna Model Used to Estimate Radiation from Printed Circuit Boards with Board-to-Board Connector. - Yuri Wakaduki; Tetsushi Watanabe; Yoshitaka Toyota; Kengo Iokibe; Liuji R. Koga; Osami Wada (IEICE Trans. Commun., 2016)

Equivalent-Circuit Model for Meta-Atoms Consisting of Wired Metallic Spheres. - Takashi Hisakado; Keisuke Yoshida; Tohlu Matsushima; Osami Wada (IEICE Trans. Electron., 2017)

Equivalent-Circuit Model with Retarded Electromagnetic Coupling for Meta-Atoms of Wired Metallic Spheres. - Katsuya Ohishi; Takashi Hisakado; Tohlu Matsushima; Osami Wada (IEICE Trans. Electron., 2018)

A process scalable voltage-reference-free temperature sensor utilizing MOSFET threshold voltage variation. - Shogo Harada; Mahfuzul Islam 001; Takashi Hisakado; Osami Wada (A-SSCC, 2021)

Flash ADC Utilizing Offset Voltage Variation With Order Statistics Based Comparator Selection. - Takehiro Kitamura; Mahfuzul Islam 001; Takashi Hisakado; Osami Wada (ISQED, 2021)

Performance Improvement of Order Statistics Based Flash ADC Using Multiple Comparator Groups. - Takehiro Kitamura; Mahfuzul Islam 001; Takashi Hisakado; Osami Wada (NEWCAS, 2022)

Circuit analysis of radiation reaction in metamaterials by retarded electromagnetic coupling. - Ryoma Nakata; Takashi Hisakado; Tohlu Matsushima; Osami Wada (IET Circuits Devices Syst., 2022)

Low-Power Design of Digital LDO With Nonlinear Symmetric Frequency Generation. - Shun Yamaguchi; Mahfuzul Islam 001; Takashi Hisakado; Osami Wada (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Order Statistics Based Low-Power Flash ADC with On-Chip Comparator Selection. - Takehiro Kitamura; Mahfuzul Islam 001; Takashi Hisakado; Osami Wada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022)

Demonstration of Order Statistics Based Flash ADC in a 65nm Process. - Mahfuzul Islam 001; Takehiro Kitamura; Takashi Hisakado; Osami Wada (ASP-DAC, 2023)

A Fully Synchronous Digital LDO with Built-in Adaptive Frequency Modulation and Implicit Dead-Zone Control. - Shun Yamaguchi; Mahfuzul Islam 001; Takashi Hisakado; Osami Wada (ASP-DAC, 2023)

An Adaptive-Sampling Digital LDO with Statistical Comparator Selection Achieving 99.99% Maximum Current Efficiency and 0.25ps FoM in 65nm. - Shun Yamaguchi; Takashi Hisakado; Osami Wada; Mahfuzul Islam 001 (A-SSCC, 2023)

CMOS Temperature Sensor Utilizing Gate-length-based Threshold Voltage Modulation. - Mahfuzul Islam 001; Shogo Harada; Takashi Hisakado; Osami Wada (NEWCAS, 2023)

Design of Reference-free Flash ADC With On-chip Rank-based Comparator Selection Using Multiple Comparator Groups. - Takehiro Kitamura; Takashi Hisakado; Osami Wada; Mahfuzul Islam 001 (IPSJ Trans. Syst. LSI Des. Methodol., 2024)