A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer. - Osamu Watanabe 003; Takafumi Yamaji; Tetsuro Itakura; Ichiro Hattori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

A four-input beam-forming downconverter for adaptive antennas. - Takafumi Yamaji; Daisuke Kurose; Osamu Watanabe 003; Shuichi Obayashi; Tetsuro Itakura (IEEE J. Solid State Circuits, 2003)

A Low LO Leakage and Low Power LO Buffer for Direct-Conversion Quadrature Demodulator. - Toshiya Mitomo; Osamu Watanabe 003; Shoji Otaka; Ryuichi Fujimoto; Shunji Kawaguchi (IEICE Trans. Electron., 2005)

A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakage. - Toshiya Mitomo; Osamu Watanabe 003; Ryuichi Fujimoto; Shunji Kawaguchi (IEICE Trans. Electron., 2007)

A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems. - Osamu Watanabe 003; Rui Ito; Shigehito Saigusa; Tadashi Arai; Tetsuro Itakura (IEICE Trans. Electron., 2007)

A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals. - Osamu Watanabe 003; Rui Ito; Toshiya Mitomo; Shigehito Saigusa; Tadashi Arai; Takehiko Toyoda (IEICE Trans. Electron., 2008)

A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range. - Masahiro Hosoya; Toshiya Mitomo; Osamu Watanabe 003 (ESSCIRC, 2010)

A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization. - Hiroaki Ishihara; Masahiro Hosoya; Shoji Otaka; Osamu Watanabe 003 (ISSCC, 2010)

A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization. - Hiroaki Ishihara; Masahiro Hosoya; Shoji Otaka; Osamu Watanabe 003 (IEEE J. Solid State Circuits, 2010)

A 77 GHz 90 nm CMOS Transceiver for FMCW Radar Applications. - Toshiya Mitomo; Naoko Ono; Hiroaki Hoshino; Yoshiaki Yoshihara; Osamu Watanabe 003; Ichiro Seto (IEEE J. Solid State Circuits, 2010)

A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller. - Kohei Onizuka; Hiroaki Ishihara; Masahiro Hosoya; Shigehito Saigusa; Osamu Watanabe 003; Shoji Otaka (CICC, 2011)

A 1.5GHz-modulation-range 10ms-modulation-period 180kHzrms-frequency-error 26MHz-reference mixed-mode FMCW synthesizer for mm-wave radar application. - Hiroki Sakurai; Yuka Kobayashi; Toshiya Mitomo; Osamu Watanabe 003; Shoji Otaka (ISSCC, 2011)

A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65nm CMOS. - Akihide Sai; Yuka Kobayashi; Shigehito Saigusa; Osamu Watanabe 003; Tetsuro Itakura (ISSCC, 2012)

A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion. - Kohei Onizuka; Hiroaki Ishihara; Masahiro Hosoya; Shigehito Saigusa; Osamu Watanabe 003; Shoji Otaka (IEEE J. Solid State Circuits, 2012)

A 60 GHz Power Amplifier with 10 GHz 1-dB Bandwidth and 13.6% PAE in 65 nm CMOS. - Tong Wang 018; Toshiya Mitomo; Naoko Ono; Shigehito Saigusa; Osamu Watanabe 003 (IEICE Trans. Electron., 2013)

20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. - Shigehito Saigusa; Toshiya Mitomo; Hidenori Okuni; Masahiro Hosoya; Akihide Sai; Shusuke Kawai; Tong Wang 018; Masanori Furuta; Kei Shiraishi; Koichiro Ban; Seiichiro Horikawa; Tomoya Tandai; et al. (ISSCC, 2014)