A VLSI design of clock gated technique based ADC lock-in amplifier. - M. Saritha; M. Lavanya; G. Ajitha; Mulinti Narendra Reddy; P. Annapurna; Menda Sreevani; S. Swathi; S. Sushma; Vallabhuni Vijay (Int. J. Syst. Assur. Eng. Manag., 2022)