LATCHECK: A Latchup Checker for VLSI Layouts. - Aditya Agrawal; P. V. Srinivas; Gade Sreenivas; Uttiya Dasgupta (VLSI Design, 1993)

Noise-Aware Driver Modeling for Nanometer Technology. - Xiaoliang Bai; Rajit Chandra; Sujit Dey; P. V. Srinivas (ISQED, 2003)

Interconnect coupling-aware driver modeling in static noise analysis for nanometer circuits. - Xiaoliang Bai; Rajit Chandra; Sujit Dey; P. V. Srinivas (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Chip assembly: a new paradigm in hierarchical physical design. - P. V. Srinivas (ISPD, 2006)