Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. - Swarup Mohalik; A. C. Rajeev; Manoj G. Dixit; S. Ramesh 002; P. Vijay Suman; Paritosh K. Pandya; Shengbing Jiang (DAC, 2008)

Timed Automata with Integer Resets: Language Inclusion and Expressiveness. - P. Vijay Suman; Paritosh K. Pandya; Shankara Narayanan Krishna; Lakshmi Manasa (FORMATS, 2008)

Timed and Hybrid Automata in SAL. - P. Vijay Suman; Paritosh K. Pandya (SYNASC, 2008)

Determinization and Expressiveness of Integer Reset Timed Automata with Silent Transitions. - P. Vijay Suman; Paritosh K. Pandya (LATA, 2009)

Masking Boundary Value Coverage: Effectiveness and Efficiency. - P. Vijay Suman; Tukaram Muske; Prasad Bokil; Ulka Shrotri; R. Venkatesh 001 (TAIC PART, 2010)

An Introduction to Timed Automata. - Paritosh K. Pandya; P. Vijay Suman (Modern Applications of Automata Theory, 2012)

Effectiveness of Random Testing of Embedded Systems. - Padmanabhan Krishnan; R. Venkatesh 001; Prasad Bokil; Tukaram Muske; P. Vijay Suman (HICSS, 2012)