New Schemes in Clustered VLIW Processors Applied to Turbo Decoding. - Pablo Ituero; Marisa López-Vallejo (ASAP, 2006)

Joint Source-Channel Decoding ASIP Architecture for Sensor Networks. - Pablo Ituero; Gorka Landaburu; Javier Del Ser; Marisa López-Vallejo; Pedro M. Crespo; Vicente Atxa; Jon Altuna (ICESS, 2007)

Leakage-based On-Chip Thermal Sensor for CMOS Technology. - Pablo Ituero; José L. Ayala; Marisa López-Vallejo (ISCAS, 2007)

On-chip Monitoring: A Light-Weight Interconnection Network Approach. - Pablo Ituero; Marisa López-Vallejo; Miguel A. Sánchez Marcos; Carlos Gómez Osuna (DSD, 2011)

A monitoring infrastructure for FPGA self-awareness and dynamic adaptation. - Carlos Gómez Osuna; Miguel A. Sánchez Marcos; Pablo Ituero; Marisa López-Vallejo (ICECS, 2012)

A Low-Area Reference-Free Power Supply Sensor. - Carlos Benito; Pablo Ituero; Marisa López-Vallejo (DSD, 2013)

A 0.0016 mm2 0.64 nJ Leakage-Based CMOS Temperature Sensor. - Pablo Ituero; Marisa López-Vallejo; Carlos A. López-Barrio (Sensors, 2013)

A Self-Timed Multipurpose Delay Sensor for Field Programmable Gate Arrays (FPGAs). - Carlos Gómez Osuna; Pablo Ituero; Marisa López-Vallejo (Sensors, 2014)

A thermal adaptive scheme for reliable write operation on RRAM based architectures. - Fernando García-Redondo; Marisa López-Vallejo; Pablo Ituero (ICCD, 2015)

Reliable design methodology: The combined effect of radiation, variability and temperature. - Fernando García-Redondo; Marisa López-Vallejo; Hernan Aparicio; Pablo Ituero (SMACD, 2016)

Statistically-aided electronic design environment. - Carlos Gil-Soriano; Pablo Ituero (SMACD, 2016)

Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges. - Fernando García-Redondo; Pablo Royer; Marisa López-Vallejo; Hernan Aparicio; Pablo Ituero; Carlos A. López-Barrio (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A 40nm Critical Path Monitor for the Detection of Setup and Hold Time Violations. - Hernan Aparicio; Pablo Ituero (PATMOS, 2018)

Time-Domain Coding for Resource-Efficient Deep Neural Networks. - Sergio Ávalos-Legaz; Pablo Ituero (DCIS, 2019)

STDP Design Trade-offs for FPGA-Based Spiking Neural Networks. - Rafael Medina Morillas; Pablo Ituero (DCIS, 2020)

A 900 μm2 BiCMOS Temperature Sensor for Dynamic Thermal Management. - Hernan Aparicio; Pablo Ituero (Sensors, 2020)

Data Synchronization in Non-Uniform Latency Custom DSP Designs. - Samuel López Asunción; Pablo Ituero; Marisa López-Vallejo; Jesús Grajal (DCIS, 2022)

Reference-free power supply monitor with enhanced robustness against process and temperature variations. - Hernan Aparicio; Pablo Ituero; Marisa López-Vallejo (Integr., 2022)