Palagani Yellappa

According to our database, Palagani Yellappa authored at least 5 papers between 2018 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET.

Aditya Japa, Palagani Yellappa, Venkateswarlu Gonuguntla, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Jun Rim Choi, Ramesh Vaddi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Design of Cardiac Status Indicator and R-R Interval Adjustment Circuits.

Sandhya Surendarraj, Palagani Yellappa, Jun Rim Choi

Proceedings of the 2019 International SoC Design Conference, 2019

2018

A Low-power Low-noise Open-loop Configured Signal Folding Neural Recording Amplifier.

Gauri Punekar, Venkateswarlu Gonuguntla, Palagani Yellappa, Jun Rim Choi, Ramesh Vaddi

Proceedings of the International SoC Design Conference, 2018

Analysis of Coil Misalignment Issue in Resonance-based Wireless Power Transmission System for Implantable Biomedical Applications.

Palagani Yellappa, Ye Rim Lee, Jun Rim Choi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Tunneling Field Effect Transistors for Enhancing Energy Efficiency and Hardware Security of IoT Platforms: Challenges and Opportunities.

Aditya Japa, T. Nagateja, Santosh Kumar Vishvakarma, Palagani Yellappa, Jun Rim Choi, Ramesh Vaddi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018