Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs. - Ahmed Mahdi; Panagiotis Sakellariou; Nikos Kanistras; Ioannis Tsatsaragkos; Vassilis Paliouras (ICECS, 2012)

Low-power two's-complement multiplication based on selective activation. - Panagiotis Sakellariou; Vassilis Paliouras (ICECS, 2012)

Low-Power Delay Sensors on FPGAs. - Panagiotis Sakellariou; Vassilis Paliouras (PATMOS, 2012)

An FPGA-based prototyping method for verification, characterization and optimization of LDPC error correction systems. - Panagiotis Sakellariou; Ioannis Tsatsaragkos; Nikos Kanistras; Ahmed Mahdi; Vassilis Paliouras (ICSAMOS, 2012)

Application-Specific Low-Power Multipliers. - Panagiotis Sakellariou; Vassilis Paliouras (IEEE Trans. Computers, 2016)

Reconfigurable RO-Path Delay Sensor. - Panagiotis Sakellariou; Vassilis Paliouras (IEEE Trans. Circuits Syst. II Express Briefs, 2018)