Power Aware and Delay Efficient Hybrid CMOS Full-Adder for Ultra Deep Submicron Technology. - Narasimha Rao Konijeti; J. V. R. Ravindra; Pandurangaiah Yagateela (EMS, 2013)

A Novel Analytical Model for Analysis of Delay and Crosstalk in Non Linear RLC Interconnects for Ultra Low Power Applications. - J. V. R. Ravindra; Pandurangaiah Yagateela; L. V. Narasimha Prasad (UKSim, 2013)