A heuristic path selection method for small delay defects test. - Paniz Foroutan; Mehdi Kamal; Zainalabedin Navabi (DFT, 2014)

A mathematical model for estimating acceptable ratio of test patterns. - Vahid Janfaza; Paniz Foroutan; Bahjat Forouzandeh; M. H. Haghbayan (EWDTS, 2014)

An improved scheme for pre-computed patterns in core-based SoC architecture. - Elaheh Sadredini; Reza Rahimi; Paniz Foroutan; Mahmood Fathy; Zainalabedin Navabi (EWDTS, 2016)