A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS. - Hung-Yen Tai; Cheng-Hsueh Tsai; Pao-Yang Tsai; Hung-Wei Chen; Hsin-Shu Chen (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

An 8 b 700 MS/s 1 b/Cycle SAR ADC Using a Delay-Shift Technique. - Tsung-Han Tsai; Hung-Yen Tai; Pao-Yang Tsai; Cheng-Hsueh Tsai; Hsin-Shu Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)