Design and implementation of a flexible and interactive microprogram simulator. - Marco Mezzalama; Paolo Prinetto (MICRO, 1979)

Microcode compaction via microblock definition. - Marco Mezzalama; Paolo Prinetto; G. Filippi (MICRO, 1982)

A Machine-independent Approach to Microprogram Synthesis. - Marco Mezzalama; Paolo Prinetto (Softw. Pract. Exp., 1982)

A new integrated system for PLA testing and verification. - Fabio Somenzi; Silvano Gai; Marco Mezzalama; Paolo Prinetto (DAC, 1983)

A review of fault models for lsi/vlsi devices. - Silvano Gai; Marco Mezzalama; Paolo Prinetto (Softw. Microsystems, 1983)

A Hierarchical Description Model for Microcode. - Marco Mezzalama; Paolo Prinetto (IEEE Trans. Computers, 1983)

PART: Programmable Array Testing Based on a Partitioning Algorithm. - Fabio Somenzi; Silvano Gai; Marco Mezzalama; Paolo Prinetto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984)

Testing Strategy and Technique for Macro-Based Circuits. - Fabio Somenzi; Silvano Gai; Marco Mezzalama; Paolo Prinetto (IEEE Trans. Computers, 1985)

Experiences in Prolog-Based DFT Rule Checking. - Gianpiero Cabodi; Paolo Camurati; Paolo Prinetto (FJCC, 1986)

A functional approach to formal hardware verification: the MTI experience. - Dominique Borrione; Paolo Camurati; J. L. Paillet; Paolo Prinetto (ICCD, 1988)

Random testability analysis: comparing and evaluating existing approaches. - Paolo Camurati; Paolo Prinetto; Matteo Sonza Reorda (ICCD, 1988)

Formal Verification of Hardware Correctness: Introduction and Survey of Current Research. - Paolo Camurati; Paolo Prinetto (Computer, 1988)

ESTA: an expert system for DFT rule verification. - Paolo Camurati; Paolo Gianoglio; Renato Gianoglio; Paolo Prinetto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Zero-Defect Designs, Why and How: Formal Verification vs. Automated Synthesis. - Dominique Borrione; Paolo Prinetto (IFIP Congress, 1989)

Expressing logical and temporal conditions in simulation environments: TPDL*. - Gianpiero Cabodi; Paolo Camurati; Paolo Prinetto; Matteo Sonza Reorda (Microprocessing and Microprogramming, 1989)

Systolic array description in F2. - Paolo Camurati; Tiziana Margaria; Paolo Prinetto (Microprocessing and Microprogramming, 1989)

Knowledge-based systems as an aid to computer-aided repair. - Paolo Camurati; Marco Mezzalama; Paolo Prinetto (Microprocess. Microsystems, 1989)

The Use of Model Checking in ATPG for Sequential Circuits. - Paolo Camurati; Marco Gilli; Paolo Prinetto; Matteo Sonza Reorda (CAV, 1990)

Model Checking and Graph Theory in Sequential ATPG. - Paolo Camurati; Marco Gilli; Paolo Prinetto; Matteo Sonza Reorda (CAV (DIMACS/AMS volume), 1990)

Diagnosis oriented test pattern generation. - Paolo Camurati; Antonio Lioy; Paolo Prinetto; Matteo Sonza Reorda (EURO-DAC, 1990)

A diagnostic test pattern generation algorithm. - Paolo Camurati; Davide Medina; Paolo Prinetto; Matteo Sonza Reorda (ITC, 1990)

Exact probabilistic testability measures for multi-output circuits. - Paolo Camurati; Paolo Prinetto; Matteo Sonza Reorda (J. Electron. Test., 1990)

Assessing the diagnostic power of test pattern sets. - Paolo Camurati; Antonio Lioy; Paolo Prinetto; Matteo Sonza Reorda (Microprocessing and Microprogramming, 1990)

The OTTER environment for resolution-based proof of hardware correctness. - Paolo Camurati; Tiziana Margaria; Paolo Prinetto (Microprocessing and Microprogramming, 1990)

Resolution-based correctness proofs of synchronous circuits. - Paolo Camurati; Tiziana Margaria; Paolo Prinetto (EURO-DAC, 1991)

Proving finite state machines correct with an automaton-based method. - Paolo Camurati; Marco Gilli; Paolo Prinetto; Matteo Sonza Reorda (Great Lakes Symposium on VLSI, 1991)

TPDL: Extended Temporal Profile Description Language. - Gianpiero Cabodi; Paolo Camurati; Paolo Prinetto; Matteo Sonza Reorda (Softw. Pract. Exp., 1991)

A New Model for Improving symbolic Product Machine Traversal. - Gianpiero Cabodi; Paolo Camurati; Fulvio Corno; Silvano Gai; Paolo Prinetto; Matteo Sonza Reorda (DAC, 1992)

Cross-fertilizing FSM verification techniques and sequential diagnosis. - Gianpiero Cabodi; Paolo Camurati; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (EURO-DAC, 1992)

Sequential Circuit Diagnosis Based on Formal Verification Techniques. - Gianpiero Cabodi; Paolo Camurati; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ITC, 1992)

A Methodology for System-Level Design for Verifiability. - Paolo Camurati; Fulvio Corno; Paolo Prinetto (CHARME, 1993)

Exploiting Symbolic Traversal Techniques for Efficient Process Algebra Manipulation. - Paolo Camurati; Fulvio Corno; Paolo Prinetto (CHDL, 1993)

An efficient tool for system-level verification of behaviors and temporal properties. - Paolo Camurati; Fulvio Corno; Paolo Prinetto (EURO-DAC, 1993)

An approach to sequential circuit diagnosis based on formal verification techniques. - Gianpiero Cabodi; Paolo Camurati; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (J. Electron. Test., 1993)

A process algebra interpretation of a verification oriented overlanguage of VHDL. - Catherine Bayol; Bernard Soulas; Dominique Borrione; Fulvio Corno; Paolo Prinetto (EURO-DAC, 1994)

System-Level Modeling and Verification: a Comprehensive Design Methodology. - Paolo Camurati; Fulvio Corno; Paolo Prinetto; Catherine Bayol; Bernard Soulas (EDAC-ETC-EUROASIC, 1994)

An experimental analysis of the effectiveness of the circular self-test path technique. - Paolo Prinetto; Fulvio Corno; Matteo Sonza Reorda (EURO-DAC, 1994)

GATTO: An Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits. - Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Enzo Veiluva (ICTAI, 1994)

Making the Circular Self-Test Path Technique Effective for Real Circuits. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ITC, 1994)

An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms. - Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ITC, 1994)

A new functional fault model for system-level descriptions. - Paolo Camurati; Fulvio Corno; Michela Meo; Paolo Prinetto (VTS, 1994)

An industrial experience in the built-in self test of embedded RAMs. - Paolo Camurati; Paolo Prinetto; Matteo Sonza Reorda; Stefano Barbagallo; Andrea Burri; Davide Medina (VTS, 1994)

Proving testing preorders for process algebra descriptions. - Fulvio Corno; Marco Cusinato; Mario Ferrero; Paolo Prinetto (ED&TC, 1995)

Using symbolic techniques to find the maximum clique in very large sparse graphs. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ED&TC, 1995)

GARDA: a diagnostic ATPG for large synchronous sequential circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ED&TC, 1995)

A PVM tool for automatic test generation on parallel and distributed systems. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Enzo Veiluva (HPCN Europe, 1995)

Testing a Switching Memory in a Telcommunication System. - Stefano Barbagallo; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ITC, 1995)

Improving topological ATPG with symbolic techniques. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda; Uwe Gläser; Heinrich Theodor Vierhaus (VTS, 1995)

A portable ATPG tool for parallel and distributed systems. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Enzo Veiluva (VTS, 1995)

Industrial BIST of Embedded RAMs. - Paolo Camurati; Paolo Prinetto; Matteo Sonza Reorda; Stefano Barbagallo; Andrea Burri; Davide Medina (IEEE Des. Test Comput., 1995)

Self-Checking and Fault Tolerant Approaches Can Help BIST Fault Coverage: A Case Study. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ED&TC, 1996)

Advanced Techniques for GA-based sequential ATPGs. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; R. Mosca (ED&TC, 1996)

On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Maurizio Damiani; Leonardo Impagliazzo; G. Sartore (EDCC, 1996)

Fault behavior observation of a microprocessor system through a VHDL simulation-based fault injection experiment. - Paolo Prinetto; Alfredo Benso; Fulvio Corno; Maurizio Rebaudengo; Matteo Sonza Reorda; Arturo M. Amendola; Leonardo Impagliazzo; P. Marmo (EURO-DAC, 1996)

Fault tolerant and BIST design of a FIFO cell. - Paolo Prinetto; Fulvio Corno; Matteo Sonza Reorda (EURO-DAC, 1996)

A Parallel Genetic Algorithm for Automatic Generation of Test Sequences for Digital Circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (HPCN Europe, 1996)

A Genetic Algorithm for Automatic Generation of Test Logic for Digital Circuits. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ICTAI, 1996)

Comparing Topological, Symbolic and GA-based ATPGs: An Experimental Approach. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ITC, 1996)

Partial Scan Flip Flop Selection for Simulation-Based Sequential ATPGs. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ITC, 1996)

Exploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Cicuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (PPSN, 1996)

Scan insertion criteria for low design impact. - Stefano Barbagallo; Monica Lobetti Bodoni; Davide Medina; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (VTS, 1996)

Circular Self-Test Path for FSMs. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (IEEE Des. Test Comput., 1996)

GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Guaranteeing Testability in Re-encoding for Low Power. - Silvia Chiusano; Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (Asian Test Symposium, 1997)

A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Giovanni Squillero (Asian Test Symposium, 1997)

Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante (Asian Test Symposium, 1997)

Simulation-based verification of network protocols performance. - Mario Baldi; Fulvio Corno; Maurizio Rebaudengo; Paolo Prinetto; Matteo Sonza Reorda; Giovanni Squillero (CHARME, 1997)

A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs. - Alfredo Benso; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Raimund Ubar (ED&TC, 1997)

Hybrid symbolic-explicit techniques for the graph coloring problem. - Silvia Chiusano; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ED&TC, 1997)

New static compaction techniques of test sequences for sequential circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ED&TC, 1997)

Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments. - Alfredo Benso; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Jaan Raik; Raimund Ubar (DFT, 1997)

A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Giovanni Squillero (ICCD, 1997)

Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization. - S. Chuisano; Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ICTAI, 1997)

Testability Analysis and ATPG on Behavioral RT-Level VHDL. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (ITC, 1997)

SAARA: a simulated annealing algorithm for test pattern generation for digital circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (SAC, 1997)

Hardware Test: Can We Learn from Software Testing? - J. Abraham; Phyllis G. Frankl; Christian Landrault; Meryem Marzouki; Paolo Prinetto; Chantal Robach; Pascale Thévenod-Fosse (VTS, 1997)

Cellular automata for deterministic sequential test pattern generation. - Silvia Chiusano; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (VTS, 1997)

A Test Pattern Generation Algorithm Exploiting Behavioral Information. - Silvia Chiusano; Fulvio Corno; Paolo Prinetto (Asian Test Symposium, 1998)

Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. - Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda; Massimo Violante (DATE, 1998)

Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques. - Elizabeth M. Rudnick; Roberto Vietti; Akilah Ellis; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (DATE, 1998)

A fault injection environment for microprocessor-based boards. - Alfredo Benso; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ITC, 1998)

On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits. - Fulvio Corno; Nicola Gaudenzi; Paolo Prinetto; Matteo Sonza Reorda (VTS, 1998)

A Test Pattern Generation Methodology for Low-Power Consumption. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (VTS, 1998)

Integrating Online and Offline Testing of a Switching Memory. - Stefano Barbagallo; Davide Medina; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (IEEE Des. Test Comput., 1998)

The General Product Machine: a New Model for Symbolic FSM Traversal. - Gianpiero Cabodi; Paolo Camurati; Fulvio Corno; Paolo Prinetto; Matteo Sonza Reorda (Formal Methods Syst. Des., 1998)

EXFI: a low-cost fault injection system for embedded microprocessor-based boards. - Alfredo Benso; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda (ACM Trans. Design Autom. Electr. Syst., 1998)

HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs. - Alfredo Benso; Silvia Cataldo; Silvia Chiusano; Paolo Prinetto; Yervant Zorian (ITC, 1999)

Testing an MCM for high-energy physics experiments: a case study. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto; Simone Giovannetti; Riccardo Mariani; Silvano Motto (ITC, 1999)

An on-line BISTed SRAM IP core. - Monica Lobetti Bodoni; Alessio Pricco; Alfredo Benso; Silvia Chiusano; Paolo Prinetto (ITC, 1999)

RT-level TPG Exploiting High-Level Synthesis Information. - Silvia Chiusano; Fulvio Corno; Paolo Prinetto (VTS, 1999)

Testing embedded memories in telecommunication systems. - Stefano Barbagallo; Monica Lobetti Bodoni; Alfredo Benso; Silvia Chiusano; Paolo Prinetto (IEEE Commun. Mag., 1999)

Exploiting Behavioral Information in Gate-Level ATPG. - Silvia Chiusano; Fulvio Corno; Paolo Prinetto (J. Electron. Test., 1999)

SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. - Fulvio Corno; Uwe Gläser; Paolo Prinetto; Matteo Sonza Reorda; Heinrich Theodor Vierhaus; Massimo Violante (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Optimal Hardware Pattern Generation for Functional BIST. - Silvia Cataldo; Silvia Chiusano; Paolo Prinetto; Hans-Joachim Wunderlich (DATE, 2000)

'BOND': An Interposition Agents Based Fault Injector for Windows NT. - Andrea Baldini; Alfredo Benso; Silvia Chiusano; Paolo Prinetto (DFT, 2000)

Self-Repairing in a Micro-Programmed Processor for Dependable Applications. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto; P. Simonotti; G. Ugo (DFT, 2000)

A C/C++ Source-to-Source Compiler for Dependable Applications. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto; Luca Tagliaferri (DSN, 2000)

An effective distributed BIST architecture for RAMs. - Monica Lobetti Bodoni; Alfredo Benso; Silvia Chiusano; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ETW, 2000)

On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs. - Alfredo Benso; Stefano Di Carlo; Silvia Chiusano; Paolo Prinetto; Fabio Ricciato; Monica Lobetti Bodoni; Maurizio Spadari (ICCD, 2000)

An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications. - Alfredo Benso; Stefano Martinetto; Paolo Prinetto; Riccardo Mariani (ICCD, 2000)

A Family of Self-Repair SRAM Cores. - Alfredo Benso; Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (IOLTW, 2000)

A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto (IOLTW, 2000)

HD2BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs. - Alfredo Benso; Silvia Chiusano; Stefano Di Carlo; Paolo Prinetto; Fabio Ricciato; Maurizio Spadari; Yervant Zorian (ITC, 2000)

A programmable BIST architecture for clusters of multiple-port SRAMs. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (ITC, 2000)

A software development kit for dependable applications in embedded systems. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto (ITC, 2000)

Non-intrusive BIST for systems-on-a-chip. - Silvia Chiusano; Paolo Prinetto; Hans-Joachim Wunderlich (ITC, 2000)

A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures. - Alfredo Benso; Silvia Cataldo; Silvia Chiusano; Paolo Prinetto; Yervant Zorian (J. Electron. Test., 2000)

Memory Read Faults: Taxonomy and Automatic Test Generation. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (Asian Test Symposium, 2001)

Control-Flow Checking via Regular Expressions. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Luca Tagliaferri (Asian Test Symposium, 2001)

SEU effect analysis in an open-source router via a distributed fault injection environment. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DATE, 2001)

On applying the set covering model to reseeding. - Silvia Chiusano; Stefano Di Carlo; Paolo Prinetto; Hans-Joachim Wunderlich (DATE, 2001)

Embedded tutorial: TRP: integrating embedded test and ATE. - Yervant Zorian; Paolo Prinetto; João Paulo Teixeira 001; Isabel C. Teixeira; Carlos Eduardo Pereira; Octávio Páscoa Dias; Jorge Semião; Peter Muhmenthaler; W. Radermacher (DATE, 2001)

Validation of a Software Dependability Tool via Fault Injection Experiments. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Luca Tagliaferri; Paolo Prinetto (IOLTW, 2001)

Towards a unified test process: from UML to end-of-line functional test. - Andrea Baldini; Alfredo Benso; Paolo Prinetto; Sergio Mo; Andrea Taddei (ITC, 2001)

GRAAL: a tool for highly dependable SRAMs generation. - Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto; Franco Bigongiari (ITC, 2001)

Online and Offline BIST in IP-Core Design. - Alfredo Benso; Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (IEEE Des. Test Comput., 2001)

Guest Editorial. - Paolo Prinetto; Joan Figueras (J. Electron. Test., 2001)

A Self-Repairing Execution Unit for Microprogrammed Processors. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto (IEEE Micro, 2001)

Specification and Design of a New Memory Fault Simulator. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (Asian Test Symposium, 2002)

Beyond UML to an End-of-Line Functional Test Engine. - Andrea Baldini; Alfredo Benso; Paolo Prinetto; Sergio Mo; Andrea Taddei (DATE, 2002)

An Optimal Algorithm for the Automatic Generation of March Tests. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DATE, 2002)

Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA. - Michel Renovell; Penelope Faure; Paolo Prinetto; Yervant Zorian (DELTA, 2002)

Automated Synthesis of SEU Tolerant Architectures from OO Descriptions. - Silvia Chiusano; Stefano Di Carlo; Paolo Prinetto (IOLTW, 2002)

Efficient Design of System Test: A Layered Architecture. - Andrea Baldini; Alfredo Benso; Paolo Prinetto; Sergio Mo; Andrea Taddei (ITC, 2002)

Static Analysis of SEU Effects on Software Applications. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ITC, 2002)

DFT and BIST of a Multichip Module for High-Energy Physics Experiments. - Alfredo Benso; Silvia Chiusano; Paolo Prinetto (IEEE Des. Test Comput., 2002)

Initializability analysis of synchronous sequential circuits. - Fulvio Corno; Paolo Prinetto; Maurizio Rebaudengo; Matteo Sonza Reorda; Giovanni Squillero (ACM Trans. Design Autom. Electr. Syst., 2002)

An on-line BIST RAM architecture with self-repair capabilities. - Alfredo Benso; Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto (IEEE Trans. Reliab., 2002)

Exhaustive Test of Several Dependable Memory Architectures Designed by GRAAL Tool. - Fabrizio Bertuccelli; Franco Bigongiari; Andrea S. Brogna; Giorgio Di Natale; Paolo Prinetto; Roberto Saletti (Asian Test Symposium, 2003)

A Watchdog Processor to Detect Data and Control Flow Errors. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IOLTS, 2003)

FAUST: FAUlt-injection Script-based Tool. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; I. Solcia; Luca Tagliaferri (IOLTS, 2003)

Data Critically Estimation In Software Applications. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Luca Tagliaferri (ITC, 2003)

Agent Based DBIST/DBISR And Its Web/Wireless Management. - Liviu Miclea; Szilárd Enyedi; Gavril Toderean; Alfredo Benso; Paolo Prinetto (ITC, 2003)

Test Engineering Education in Europe: the EuNICE-Test Project. - Yves Bertrand; Marie-Lise Flottes; Luz Balado; Joan Figueras; Anton Biasizzo; Franc Novak; Stefano Di Carlo; Paolo Prinetto; Nicoleta Pricopi; Hans-Joachim Wunderlich; Jean-Pierre Van der Heyden (MSE, 2003)

Designing and Testing High Dependable Memories for Aerospace Applications. - Andrea S. Brogna; Franco Bigongiari; Silvia Chiusano; Paolo Prinetto; Roberto Saletti (VLSI-SOC, 2003)

Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (IEEE Commun. Mag., 2003)

Online Self-Repair of FIR Filters. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IEEE Des. Test Comput., 2003)

A Hierarchical Infrastructure for SoC Test Management. - Alfredo Benso; Stefano Di Carlo; Paolo Prinetto; Yervant Zorian (IEEE Des. Test Comput., 2003)

Design for Testability for Highly Reconfigurable Component-Based Systems. - Andrea Baldini; Paolo Prinetto; Giovanni Denaro; Mauro Pezzè (TACoS, 2003)

Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. - Marie-Lise Flottes; Yves Bertrand; Luz Balado; Emili Lupon; Anton Biasizzo; Franc Novak; Stefano Di Carlo; Paolo Prinetto; Nicoleta Pricopi; Hans-Joachim Wunderlich (DELTA, 2004)

Towards Microagent based DBIST/DBISR. - Liviu Miclea; Szilárd Enyedi; Gavril Toderean; Alfredo Benso; Paolo Prinetto (ITC, 2004)

Test Technology TC Newsletter. - Paolo Prinetto; Alfredo Benso (IEEE Des. Test Comput., 2004)

A Dependable Autonomic Computing Environment for Self-Testing of Complex Heterogeneous Systems. - Andrea Baldini; Alfredo Benso; Paolo Prinetto (TACoS, 2004)

Test Technology Technical Council Newsletter. - Paolo Prinetto (J. Electron. Test., 2004)

A GQM Based E-Learning Platform Evaluation. - Bruno Fabini; Paolo Maresca; Paolo Prinetto; C. Sanghez; Giorgio Santiano (DMS, 2005)

Automatic March tests generation for static and dynamic faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ETS, 2005)

March AB, March AB1: new March tests for unlinked dynamic memory faults. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ITC, 2005)

Reconfigurable systems self-healing using mobile hardware agents. - Alfredo Benso; Alessandro Cilardo; Nicola Mazzocca; Liviu Miclea; Paolo Prinetto; Szilárd Enyedi (ITC, 2005)

Agent-based test and repair of distributed systems. - Liviu Miclea; Szilárd Enyedi; Paolo Prinetto; Alfredo Benso (J. Embed. Comput., 2005)

System-level functional testing from UML specifications in end-of-production industrial environments. - Andrea Baldini; Alfredo Benso; Paolo Prinetto (Int. J. Softw. Tools Technol. Transf., 2005)

Memory Fault Simulator for Static-Linked Faults. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ATS, 2006)

ATPG for Dynamic Burn-In Test in Full-Scan Circuits. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ATS, 2006)

Automatic march tests generations for static linked faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DATE, 2006)

A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DDECS, 2006)

Automatic March Tests Generation for Multi-Port SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DELTA, 2006)

A 22n March Test for Realistic Static Linked Faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ETS, 2006)

Single-Event Upset Analysis and Protection in High Speed Circuits. - Mohammad Hosseinabady; Pejman Lotfi-Kamran; Giorgio Di Natale; Stefano Di Carlo; Alfredo Benso; Paolo Prinetto (ETS, 2006)

A Wiki for discussing and promoting best practices in research. - Mark D. Hill; Jean-Luc Gaudiot; Mary W. Hall; Joe Marks; Paolo Prinetto; Donna Baglio (Commun. ACM, 2006)

Automating the IEEE std.1500 compliance verification for embedded cores. - Alfredo Benso; Stefano Di Carlo; Paolo Prinetto; Alberto Bosio (HLDVT, 2007)

Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. - Mohammad Hosseinabady; Mohammad Hossein Neishaburi; Zainalabedin Navabi; Alfredo Benso; Stefano Di Carlo; Paolo Prinetto; Giorgio Di Natale (IOLTS, 2007)

March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs. - Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IET Comput. Digit. Tech., 2007)

Influence of Parasitic Capacitance Variations on 65 nm and 32 nm Predictive Technology Model SRAM Core-Cells. - Stefano Di Carlo; Alessandro Savino; Alberto Scionti; Paolo Prinetto (ATS, 2008)

An Avatar-Based Italian Sign Language Visualization System. - Andrea Falletto; Paolo Prinetto; Gabriele Tiotto (eHealth, 2008)

Applying March Tests to K-Way Set-Associative Cache Memories. - Simone Alpe; Stefano Di Carlo; Paolo Prinetto; Alessandro Savino (ETS, 2008)

An IEEE 1500 compatible wrapper architecture for testing cores at transaction level. - Fatemeh Refan; Paolo Prinetto; Zainalabedin Navabi (EWDTS, 2008)

Functional testing approaches for "BIFST-able" tlm_fifo. - Homa Alemzadeh; Zainalabedin Navabi; Stefano Di Carlo; Alberto Scionti; Paolo Prinetto (HLDVT, 2008)

Automating defects simulation and fault modeling for SRAMs. - Stefano Di Carlo; Paolo Prinetto; Alberto Scionti; Zaid Al-Ars (HLDVT, 2008)

Reliability in Application Specific Mesh-Based NoC Architectures. - Fatemeh Refan; Homa Alemzadeh; Saeed Safari; Paolo Prinetto; Zainalabedin Navabi (IOLTS, 2008)

"Plug & Test" at System Level via Testable TLM Primitives. - Homa Alemzadeh; Stefano Di Carlo; Fatemeh Refan; Paolo Prinetto; Zainalabedin Navabi (ITC, 2008)

March Test Generation Revealed. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IEEE Trans. Computers, 2008)

IEEE Standard 1500 Compliance Verification for Embedded Cores. - Alfredo Benso; Stefano Di Carlo; Paolo Prinetto; Yervant Zorian (IEEE Trans. Very Large Scale Integr. Syst., 2008)

A FPGA-Based Reconfigurable Software Architecture for Highly Dependable Systems. - Stefano Di Carlo; Paolo Prinetto; Alberto Scionti (Asian Test Symposium, 2009)

Test exploration and validation using transaction level models. - Michael A. Kochte; Christian G. Zoellin; Michael E. Imhof; Rauf Salimi Khaligh; Martin Radetzki; Hans-Joachim Wunderlich; Stefano Di Carlo; Paolo Prinetto (DATE, 2009)

System Level Testing via TLM 2.0 Debug Transport Interface. - Stefano Di Carlo; Nadereh Hatami; Paolo Prinetto; Alessandro Savino (DFT, 2009)

FLARE: A design environment for FLASH-based space applications. - Maurizio Caramia; Stefano Di Carlo; Michele Fabiano; Paolo Prinetto (HLDVT, 2009)

Test infrastructures evaluation at transaction level. - Stefano Di Carlo; Nadereh Hatami; Paolo Prinetto (ITC, 2009)

Designing health care applications for the deaf. - Paolo Prinetto; Gabriele Tiotto; Andrea Del Principe (PervasiveHealth, 2009)

Are IEEE-1500-Compliant Cores Really Compliant to the Standard?. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Paolo Prinetto (IEEE Des. Test Comput., 2009)

Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level. - Michael A. Kochte; Christian G. Zoellin; Rafal Baranowski; Michael E. Imhof; Hans-Joachim Wunderlich; Nadereh Hatami; Stefano Di Carlo; Paolo Prinetto (Asian Test Symposium, 2010)

Microprocessor fault-tolerance via on-the-fly partial reconfiguration. - Stefano Di Carlo; Andrea Miele; Paolo Prinetto; Antonio Trapanese (ETS, 2010)

Facilitating testability of TLM FIFO: SystemC implementations. - Homa Alemzadeh; Marco Cimei; Paolo Prinetto; Zainalabedin Navabi (EWDTS, 2010)

Exploring modeling and testing of NAND flash memories. - Stefano Di Carlo; Michele Fabiano; Roberto Piazza; Paolo Prinetto (EWDTS, 2010)

EDACs and test integration strategies for NAND flash memories. - Stefano Di Carlo; Michele Fabiano; Roberto Piazza; Paolo Prinetto (EWDTS, 2010)

Communication interface synthesis from TLM 2.0 to RTL. - Nadereh Hatami; Marco Indaco; Paolo Prinetto; Gabriele Tiotto (EWDTS, 2010)

Sign Language synthesis using hand motion acquisition. - Nadereh Hatami; Paolo Prinetto; Gabriele Tiotto (EWDTS, 2010)

Automated synthesis of EDACs for FLASH memories with user-selectable correction capability. - Maurizio Caramia; Michele Fabiano; Andrea Miele; Roberto Piazza; Paolo Prinetto (HLDVT, 2010)

A Web Based Platform for Sign Language Corpus Creation. - Davide Barberis; Nicola Garazzino; Elio Piccolo; Paolo Prinetto; Gabriele Tiotto (ICCHP (2), 2010)

System reliability evaluation using concurrent multi-level simulation of structural faults. - Michael A. Kochte; Christian G. Zoellin; Rafal Baranowski; Michael E. Imhof; Hans-Joachim Wunderlich; Nadereh Hatami; Stefano Di Carlo; Paolo Prinetto (ITC, 2010)

Improving accessibility for deaf people: an editor for computer assisted translation through virtual avatars. - Davide Barberis; Nicola Garazzino; Paolo Prinetto; Gabriele Tiotto (ASSETS, 2011)

MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Daniele Rolfo; Paolo Prinetto (Asian Test Symposium, 2011)

Genetic Defect Based March Test Generation for SRAM. - Stefano Di Carlo; Gianfranco Politano; Paolo Prinetto; Alessandro Savino; Alberto Scionti (EvoApplications (2), 2011)

A unifying formalism to support automated synthesis of SBSTs for embedded caches. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Daniele Rolfo; Paolo Prinetto (EWDTS, 2011)

Validation & Verification of an EDA automated synthesis tool. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Daniele Rolfo; Paolo Prinetto (IDT, 2011)

An area-efficient 2-D convolution implementation on FPGA for space applications. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Daniele Rolfo; Gabriele Tiotto; Paolo Prinetto (IDT, 2011)

Efficient multi-level fault simulation of HW/SW systems for structural faults. - Rafal Baranowski; Stefano Di Carlo; Nadereh Hatami; Michael E. Imhof; Michael A. Kochte; Paolo Prinetto; Hans-Joachim Wunderlich; Christian G. Zoellin (Sci. China Inf. Sci., 2011)

Software-Based Self-Test of Set-Associative Cache Memories. - Stefano Di Carlo; Paolo Prinetto; Alessandro Savino (IEEE Trans. Computers, 2011)

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories. - Cristian Zambelli; Marco Indaco; Michele Fabiano; Stefano Di Carlo; Paolo Prinetto; Piero Olivo; Davide Bertozzi (DATE, 2012)

Efficient system-level aging prediction. - Nadereh Hatami; Rafal Baranowski; Paolo Prinetto; Hans-Joachim Wunderlich (ETS, 2012)

A platform-independent user-friendly dictionary from Italian to LIS. - Umar Shoaib; Nadeem Ahmad; Paolo Prinetto; Gabriele Tiotto (LREC, 2012)

AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications. - Stefano Di Carlo; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (AHS, 2013)

Stereo vision system for capture and removal of space debris. - Francesco Rosso; Francesco Gallo; Walter Allasia; Enrico Licata; Paolo Prinetto; Daniele Rolfo; Pascal Trotta; Alain Favetto; Marco Paleari; Paolo Ariano (DASIP, 2013)

A software-based self test of CUDA Fermi GPUs. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Ippazio Martella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (ETS, 2013)

Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (FPL, 2013)

FEMIP: A high performance FPGA-based features extractor & matcher for space applications. - Stefano Di Carlo; Giulio Gambardella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta; Piergiorgio Lanza (FPL, 2013)

ZipStream: Improving dependability in dynamic partial reconfiguration. - Stefano Di Carlo; Giulio Gambardella; Trong Huynh Bao; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (IDT, 2013)

SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications. - Stefano Di Carlo; Giulio Gambardella; Piergiorgio Lanza; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (IDT, 2013)

Increasing the robustness of CUDA Fermi GPU-based systems. - Stefano Di Carlo; Giulio Gambardella; Marco Indaco; Ippazio Martella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (IOLTS, 2013)

Ef3S: An evaluation framework for flash-based systems. - Stefano Di Carlo; Salvatore Galfano; Marco Indaco; Paolo Prinetto (IOLTS, 2013)

Fault mitigation strategies for CUDA GPUs. - Stefano Di Carlo; Giulio Gambardella; Ippazio Martella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (ITC, 2013)

Exploring a New Dimension in Code Mobility for Ubiquitous Embedded Systems. - Alessandro Cilardo; Nicola Mazzocca; Paolo Prinetto (UIC/ATC, 2013)

Design and optimization of adaptable BCH codecs for NAND flash memories. - Michele Fabiano; Marco Indaco; Stefano Di Carlo; Paolo Prinetto (Microprocess. Microsystems, 2013)

ABLUR: An FPGA-based adaptive deblurring core for real-time applications. - Giuseppe Airo Farulla; Marco Indaco; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (AHS, 2014)

SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives. - Lorenzo Zuolo; Cristian Zambelli; Rino Micheloni; Salvatore Galfano; Marco Indaco; Stefano Di Carlo; Paolo Prinetto; Piero Olivo; Davide Bertozzi (DATE, 2014)

Reliability estimation at block-level granularity of spin-transfer-torque MRAMs. - Stefano Di Carlo; Marco Indaco; Paolo Prinetto; Elena I. Vatajelu; Rosa Rodríguez-Montañés; Joan Figueras (DFT, 2014)

A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs. - Stefano Di Carlo; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (DFT, 2014)

On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems. - Stefano Di Carlo; Giulio Gambardella; Paolo Prinetto; Frank Reichenbach; Trond Løkstad; Gulzaib Rafiq (DSD, 2014)

DTIS 2014 foreword. - Ioannis Voyiatzis; Michel Renovell; Mohamed Masmoudi; Paolo Prinetto; Giorgio Di Natale (DTIS, 2014)

On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial). - Marco Indaco; Paolo Prinetto; Elena I. Vatajelu (ETS, 2014)

Integration of STT-MRAM model into CACTI simulator. - S. Arcaro; Stefano Di Carlo; Marco Indaco; D. Pala; Paolo Prinetto; Elena I. Vatajelu (IDT, 2014)

A novel methodology to increase fault tolerance in autonomous FPGA-based systems. - Stefano Di Carlo; Giulio Gambardella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta; Alessandro Vallero (IOLTS, 2014)

A cloud-based Cyber-Physical System for environmental monitoring. - Teodora Sanislav; George Dan Mois; Silviu Folea; Liviu Miclea; Giulio Gambardella; Paolo Prinetto (MECO, 2014)

A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris. - Stefano Di Carlo; Paolo Prinetto; Daniele Rolfo; Nicola Sansonne; Pascal Trotta (EURASIP J. Adv. Signal Process., 2014)

Integrating MultiWordNet with Italian Sign Language lexical resources. - Umar Shoaib; Nadeem Ahmad; Paolo Prinetto; Gabriele Tiotto (Expert Syst. Appl., 2014)

FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories. - Stefano Di Carlo; Salvatore Galfano; Marco Indaco; Paolo Prinetto; Davide Bertozzi; Piero Olivo; Cristian Zambelli (ACM Trans. Archit. Code Optim., 2014)

Multilevel Simulation of Nonfunctional Properties by Piecewise Evaluation. - Nadereh Hatami; Rafal Baranowski; Paolo Prinetto; Hans-Joachim Wunderlich (ACM Trans. Design Autom. Electr. Syst., 2014)

STT MRAM-Based PUFs. - Elena-Ioana Vatajelu; Giorgio Di Natale; Marco Indaco; Paolo Prinetto (DATE, 2015)

Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell. - Elena I. Vatajelu; Rosa Rodríguez-Montañés; Marco Indaco; Michel Renovell; Paolo Prinetto; Joan Figueras (DATE, 2015)

Online self adjusting progressive age monitoring of timing variations. - Somayeh Sadeghi Kohan; Mehdi Kamal; John McNeil; Paolo Prinetto; Zain Navabi (DTIS, 2015)

DTIS 2015 foreword. - Paolo Prinetto; Giorgio Di Natale (DTIS, 2015)

STT-MRAM cell reliability evaluation under process, voltage and temperature (PVT) variations. - Elena I. Vatajelu; Rosa Rodríguez-Montañés; Marco Indaco; Paolo Prinetto; Joan Figueras (DTIS, 2015)

Power-aware voltage tuning for STT-MRAM reliability. - Elena I. Vatajelu; Rosa Rodríguez-Montañés; Stefano Di Carlo; Marco Indaco; Michel Renovell; Paolo Prinetto; Joan Figueras (ETS, 2015)

A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs. - Stefano Di Carlo; Paolo Prinetto; Pascal Trotta; Jan Andersson (FPL, 2015)

STT-MRAM-Based Strong PUF Architecture. - Elena-Ioana Vatajelu; Giorgio Di Natale; Lionel Torres; Paolo Prinetto (ISVLSI, 2015)

Usability of Online Assistance From Semiliterate Users' Perspective. - Nadeem Ahmad; Umar Shoaib; Paolo Prinetto (Int. J. Hum. Comput. Interact., 2015)

SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives. - Lorenzo Zuolo; Cristian Zambelli; Rino Micheloni; Marco Indaco; Stefano Di Carlo; Paolo Prinetto; Davide Bertozzi; Piero Olivo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers. - Davide Bertozzi; Stefano Di Carlo; Salvatore Galfano; Marco Indaco; Piero Olivo; Paolo Prinetto; Cristian Zambelli (ACM Trans. Embed. Comput. Syst., 2015)

SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs. - Stefano Di Carlo; Giulio Gambardella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (ACM Trans. Reconfigurable Technol. Syst., 2015)

SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications. - Stefano Di Carlo; Giulio Gambardella; Paolo Prinetto; Daniele Rolfo; Pascal Trotta (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Towards a highly reliable SRAM-based PUFs. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (DATE, 2016)

SEcube™: An open-source security platform in a single SoC. - Antonio Varriale; Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto; Pascal Trotta; Tiziana Margaria (DTIS, 2016)

STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (IOLTS, 2016)

Security primitives (PUF and TRNG) with STT-MRAM. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (VTS, 2016)

STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. - Elena-Ioana Vatajelu; Giorgio Di Natale; Mario Barbareschi; Lionel Torres; Marco Indaco; Paolo Prinetto (ACM J. Emerg. Technol. Comput. Syst., 2016)

Holistic security via complex HW/SW platforms. - Giuseppe Airo Farulla; Paolo Prinetto; Antonio Varriale (DTIS, 2017)

Standards-based tools and services for building lifelong learning pathways. - Cleo Sgouropoulou; Ioannis Voyiatzis; Anastasios Koutoumanos; Said Hamdioui; Peyman Pouyan; M. Comte; Paolo Prinetto; Giuseppe Airo Farulla; Peeter Ellervee; Carlos Delgado Kloos; Raquel M. Crespo García (EDUCON, 2017)

Scan chain encryption for the test, diagnosis and debug of secure circuits. - Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre; Paolo Prinetto; Marco Restifo (ETS, 2017)

Side-channel analysis of SEcube™ platform. - Matteo Bollo; Alberto Carelli; Stefano Di Carlo; Paolo Prinetto (EWDTS, 2017)

An object-oriented open software architecture for security applications. - Giuseppe Airo Farulla; Alexander James Pane; Paolo Prinetto; Antonio Varriale (EWDTS, 2017)

Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (IVSW, 2017)

Securing bitstream integrity, confidentiality and authenticity in reconfigurable mobile heterogeneous systems. - Alberto Carelli; Carlo Alberto Cristofanini; Alessandro Vallero; Cataldo Basile; Paolo Prinetto; Stefano Di Carlo (AQTR, 2018)

An abstraction layer enabling pervasive hardware-reconfigurable systems. - Alessandro Cilardo; Nicola Mazzocca; Paolo Prinetto (Int. J. Embed. Syst., 2018)

CFI: Control Flow Integrity or Control Flow Interruption? - Nicolò Maunero; Paolo Prinetto; Gianluca Roascio (EWDTS, 2019)

Challenges and Solutions in Emerging Memory Testing. - Elena-Ioana Vatajelu; Paolo Prinetto; Mottaqiallah Taouil; Said Hamdioui (IEEE Trans. Emerg. Top. Comput., 2019)

Design and Review of Water Management System Using Ethernet, Wi-Fi 802.11n, Modbus, and Other Communication Standards. - Bishwajeet Pandey; Giuseppe Airo Farulla; Marco Indaco; Ludovico Iovino; Paolo Prinetto (Wirel. Pers. Commun., 2019)

A FPGA-based Control-Flow Integrity Solution for Securing Bare-Metal Embedded Systems. - Nicolò Maunero; Paolo Prinetto; Gianluca Roascio; Antonio Varriale (DTIS, 2020)

SEkey: A Distributed Hardware-based Key Management System. - Matteo Fornero; Nicolò Maunero; Paolo Prinetto; Antonio Varriale (EWDTS, 2020)

Hardware-based Capture-The-Flag Challenges. - Paolo Prinetto; Gianluca Roascio; Antonio Varriale (EWDTS, 2020)

EVA: A Hybrid Cyber Range. - Shabeer Ahmad; Nicolò Maunero; Paolo Prinetto (ITASEC, 2020)

Hardware Security, Vulnerabilities, and Attacks: A Comprehensive Taxonomy. - Paolo Prinetto; Gianluca Roascio (ITASEC, 2020)

Tactile sensing with gesture-controlled collaborative robot. - Francesca Sorgini; Giuseppe Airò Farulla; Nikola Lukic; Ivan Danilov; Loris Roveda; Milos Milivojevic; Terrin Babu Pulikottil; Maria Chiara Carrozza; Paolo Prinetto; Tullio Tolio; Calogero Maria Oddo; Petar B. Petrovic; et al. (MetroInd4.0&IoT, 2020)

Control-Flow Integrity for Real-Time Operating Systems: Open Issues and Challenges. - Vahid Eftekhari Moghadam; Marco Meloni; Paolo Prinetto (EWDTS, 2021)

AFTAB: A RISC-V Implementation with Configurable Gateways for Security. - Maryam Rajabalipanah; Mahboobe Sadeghipour Roodsari; Zahra Jahanpeima; Gianluca Roascio; Paolo Prinetto; Zainalabedin Navabi (EWDTS, 2021)

PAIDEUSIS: A Remote Hybrid Cyber Range for Hardware, Network, IoT Security Training. - Giulio Berra; Gaspare Ferraro; Matteo Fornero; Nicolò Maunero; Paolo Prinetto; Gianluca Roascio (ITASEC, 2021)

Real-Time Control-Flow Integrity for Multicore Mixed-Criticality IoT Systems. - Vahid Eftekhari Moghadam; Paolo Prinetto; Gianluca Roascio (ETS, 2022)

Remotizing and Virtualizing Chips and Circuits for Hardware-based Capture-the-Flag Challenges. - Gianluca Roascio; Samuele Yves Cerini; Paolo Prinetto (EuroS&P Workshops, 2022)

A Secure Canary-Based Hardware Approach Against ROP. - Mahboobe Sadeghipour Roodsari; Ebrahim Nouri; Fatemeh Sheikhshoaei; Paolo Prinetto; Zainalabedin Navabi (ITASEC, 2022)

Ontology for Cybersecurity Governance of ICT Systems. - Fabio De Rosa; Nicolò Maunero; Luca Nicoletti; Paolo Prinetto; Martina Trussoni (ITASEC, 2022)

ThreMA: Ontology-Based Automated Threat Modeling for ICT Infrastructures. - Fabio De Rosa; Nicolò Maunero; Paolo Prinetto; Federico Talentino; Martina Trussoni (IEEE Access, 2022)

Why Mary Can Hack: Effectively Introducing High School Girls to Cybersecurity. - Gabriele Costa 001; Silvia de Francisci; Serenella Valiani; Paolo Prinetto (ARES, 2023)

Towards Cybersecurity Risk Assessment Automation: an Ontological Approach. - Nicolò Maunero; Fabio De Rosa; Paolo Prinetto (DASC/PiCom/CBDCom/CyberSciTech, 2023)

LiFi-CFI: Light-weight Fine-grained Hardware CFI Protection for RISC-V. - Mahboobe Sadeghipour Roodsari; Fatemeh Sheikhshoaei; Nicolò Maunero; Paolo Prinetto; Zain Navabi (DTTIS, 2023)

Memory Integrity Techniques for Memory-Unsafe Languages: A Survey. - Vahid Eftekhari Moghadam; Gabriele Serra; Federico Aromolo; Giorgio C. Buttazzo; Paolo Prinetto (IEEE Access, 2024)

The Big Game: The Italian Avenue of Attack to Cybersecurity Skill Shortage. - Gaspare Ferraro; Nicolò Maunero; Sonia Montegiove; Paolo Prinetto (The Combined Power of Research, Education, and Dissemination, 2025)

European Test Symposium Teams: an Anniversary Snapshot. - Maksim Jenihhin; Jaan Raik; Artur Jutman; Natalia Cherezova; Raimund Ubar; Liviu Miclea; Szilárd Enyedi; I. Stefan; Ovidiu Stan; Cosmina Corches; Z. Peng; Petru Eles; et al. (ETS, 2025)