Low power design of a word-level finite field multiplier using Reordered Normal Basis. - Parham Hosseinzadeh Namin; Roberto Muscedere; Majid Ahmadi (ACSSC, 2015)

A secure test solution for sensor nodes containing crypto-cores. - Shoaleh Hashemi Namin; Ankit Mehta; Parham Hosseinzadeh Namin; Rashid Rashidzadeh; Majid Ahmadi (ISCAS, 2017)

A Fully Serial-In Parallel-Out Digit-Level Finite Field Multiplier in 𝔽2m Using Redundant Representation. - Parham Hosseinzadeh Namin; Roberto Muscedere; Majid Ahmadi (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields. - Parham Hosseinzadeh Namin; Roberto Muscedere; Majid Ahmadi (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic. - Parham Hosseinzadeh Namin; Crystal Andrea Roma; Roberto Muscedere; Majid Ahmadi (IEEE Trans. Very Large Scale Integr. Syst., 2018)