Finding Response Times in a Real-Time System. - Mathai Joseph; Paritosh K. Pandya (Comput. J., 1986)

A Structure-Directed Total Correctness Proof Rule for Recursive Procedure Calls. - Paritosh K. Pandya; Mathai Joseph (Comput. J., 1986)

Some Comments on the Assumption-Commitment Framework for Compositional Verification of Distributed Programs. - Paritosh K. Pandya (REX Workshop, 1989)

An Approach to Verifiable Compiling Specification and Prototyping. - Jonathan P. Bowen; Jifeng He 001; Paritosh K. Pandya (PLILP, 1990)

P - A Logic - A Compositional Proof System for Distributed Programs. - Paritosh K. Pandya; Mathai Joseph (Distributed Comput., 1991)

Reasoning Algebraically about Recursion. - Paul H. B. Gardiner; Paritosh K. Pandya (Sci. Comput. Program., 1992)

Verification Tools in the Development of Provably Correct Compilers. - M. R. K. Krishna Rao; Paritosh K. Pandya; R. K. Shyamasundar (FME, 1993)

ICSP and Its Relationship with ACSP and CSP. - K. Narayan Kumar; Paritosh K. Pandya (FSTTCS, 1993)

Infinitary Parallelism without Unbounded Nondeterminism in CSP. - K. Narayan Kumar; Paritosh K. Pandya (Acta Informatica, 1993)

On the Computational Power of Operators in ICSP with Fairness. - K. Narayan Kumar; Paritosh K. Pandya (FSTTCS, 1994)

A Calculus for Hybrid Sampled Data Systems. - Huiqun Yu; Paritosh K. Pandya; Yongqiang Sun (FTRTFT, 1994)

Formal Design of Hybrid Systems. - Xinyao Yu; Ji Wang 001; Chaochen Zhou; Paritosh K. Pandya (FTRTFT, 1994)

Some Extensions to Propositional Mean-Value Caculus: Expressiveness and Decidability. - Paritosh K. Pandya (CSL, 1995)

Finite Divergence. - Michael R. Hansen; Paritosh K. Pandya; Zhou Chaochen (Theor. Comput. Sci., 1995)

Weak Chop Inverses and Liveness in Mean-Value Calculus. - Paritosh K. Pandya (FTRTFT, 1996)

Recursive Mean-Value Calculus. - Paritosh K. Pandya; Y. S. Ramakrishna (FSTTCS, 1998)

Duration Calculus of Weakly Monotonic Time. - Paritosh K. Pandya; Dang Van Hung (FTRTFT, 1998)

Some Decidability Results for Duration Calculus under Synchronous Interpretation. - Manoranjan Satpathy; Dang Van Hung; Paritosh K. Pandya (FTRTFT, 1998)

Toward a theory of sequential hybrid programs. - Paritosh K. Pandya; H.-P. Wang; Qiwen Xu (PROCOMET, 1998)

Model Checking CTL*[DC]. - Paritosh K. Pandya (TACAS, 2001)

The Saga of Synchronous Bus Arbiter: On Model Checking Quantitative Timing Properties of Synchronous Programs. - Paritosh K. Pandya (SLAP@ETAPS, 2002)

Interval Duration Logic: Expressiveness and Decidability. - Paritosh K. Pandya (Theory and Practice of Timed Systems @ ETAPS, 2002)

Digitizing Interval Duration Logic. - Gaurav Chakravorty; Paritosh K. Pandya (CAV, 2003)

Finding Extremal Models of Discrete Duration Calculus formulae using Symbolic Search. - Paritosh K. Pandya (AVoCS, 2004)

Modal Strength Reduction in Quantified Discrete Duration Calculus. - Shankara Narayanan Krishna; Paritosh K. Pandya (FSTTCS, 2005)

Bounded Validity Checking of Interval Duration Logic. - Babita Sharma; Paritosh K. Pandya; Supratik Chakraborty (TACAS, 2005)

Timed Modelling and Analysis in Web Service Compositions. - Raman Kazhamiakin; Paritosh K. Pandya; Marco Pistore (ARES, 2006)

A Dose of Timed Logic, in Guarded Measure. - Kamal Lodaya; Paritosh K. Pandya (FORMATS, 2006)

Representation, Verification, and Computation of Timed Properties in Web. - Raman Kazhamiakin; Paritosh K. Pandya; Marco Pistore (ICWS, 2006)

On Sampling Abstraction of Continuous Time Logic with Durations. - Paritosh K. Pandya; Shankara Narayanan Krishna; Kuntal Loya (TACAS, 2007)

Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. - Swarup Mohalik; A. C. Rajeev; Manoj G. Dixit; S. Ramesh 002; P. Vijay Suman; Paritosh K. Pandya; Shengbing Jiang (DAC, 2008)

Timed Automata with Integer Resets: Language Inclusion and Expressiveness. - P. Vijay Suman; Paritosh K. Pandya; Shankara Narayanan Krishna; Lakshmi Manasa (FORMATS, 2008)

Marking the chops: an unambiguous temporal logic. - Kamal Lodaya; Paritosh K. Pandya; Simoni S. Shah (IFIP TCS, 2008)

Timed and Hybrid Automata in SAL. - P. Vijay Suman; Paritosh K. Pandya (SYNASC, 2008)

Efficient guided symbolic reachability using reachability expressions. - Dina Thomas; Supratik Chakraborty; Paritosh K. Pandya (Int. J. Softw. Tools Technol. Transf., 2008)

Determinization and Expressiveness of Integer Reset Timed Automata with Silent Transitions. - P. Vijay Suman; Paritosh K. Pandya (LATA, 2009)

Around Dot Depth Two. - Kamal Lodaya; Paritosh K. Pandya; Simoni S. Shah (Developments in Language Theory, 2010)

Unambiguity in Timed Regular Languages: Automata and Logics. - Paritosh K. Pandya; Simoni S. Shah (FORMATS, 2010)

On Expressive Powers of Timed Logics: Comparing Boundedness, Non-punctuality, and Deterministic Freezing. - Paritosh K. Pandya; Simoni S. Shah (CONCUR, 2011)

On Construction of Safety Signal Automata for $MITL[ : mathcal{U}, : mathcal{S}]$ Using Temporal Projections. - Dileep Raghunath Kini; Shankara Narayanan Krishna; Paritosh K. Pandya (FORMATS, 2011)

Chop Expressions and Discrete Duration Calculus. - Ajesh Babu; Paritosh K. Pandya (Modern Applications of Automata Theory, 2012)

An Introduction to Timed Automata. - Paritosh K. Pandya; P. Vijay Suman (Modern Applications of Automata Theory, 2012)

The Unary Fragments of Metric Interval Temporal Logic: Bounded versus Lower Bound Constraints. - Paritosh K. Pandya; Simoni S. Shah (ATVA, 2012)

Deterministic Logics for UL. - Paritosh K. Pandya; Simoni S. Shah (ICTAC, 2013)

The Unary Fragments of Metric Interval Temporal Logic: Bounded versus Lower bound Constraints (Full Version) - Paritosh K. Pandya; Simoni S. Shah (CoRR, 2013)

On the Decidability and Complexity of Some Fragments of Metric Temporal Logic - Khushraj Madnani; Shankara Narayanan Krishna; Paritosh K. Pandya (CoRR, 2013)

On Unary Fragments of MTL and TPTL over Timed Words. - Khushraj Madnani; Shankara Narayanan Krishna; Paritosh K. Pandya (ICTAC, 2014)

Partially Punctual Metric Temporal Logic is Decidable. - Khushraj Madnani; Shankara Narayanan Krishna; Paritosh K. Pandya (TIME, 2014)

Metric Temporal Logic with Counting. - Shankara Narayanan Krishna; Khushraj Madnani; Paritosh K. Pandya (FoSSaCS, 2016)

Two-variable Logic with a Between Relation. - Andreas Krebs; Kamal Lodaya; Paritosh K. Pandya; Howard Straubing (LICS, 2016)

Two-variable Logic with a Between Predicate. - Andreas Krebs; Kamal Lodaya; Paritosh K. Pandya; Howard Straubing (CoRR, 2016)

Making Metric Temporal Logic Rational. - Shankara Narayanan Krishna; Khushraj Madnani; Paritosh K. Pandya (MFCS, 2017)

Formalizing Timing Diagram Requirements in Discrete Duration Calculus. - Raj Mohan Matteplackel; Paritosh K. Pandya; Amol Wakankar (SEFM, 2017)

Deterministic Temporal Logics and Interval Constraints. - Kamal Lodaya; Paritosh K. Pandya (M4M@ICLA, 2017)

Formalizing Timing Diagram Requirements in Discrete Duration Calulus. - Raj Mohan Matteplackel; Paritosh K. Pandya; Amol Wakankar (CoRR, 2017)

DCSYNTH: Guided Reactive Synthesis with Soft Requirements for Robust Controller and Shield Synthesis. - Amol Wakankar; Paritosh K. Pandya; Raj Mohan Matteplackel (CoRR, 2017)

Logics Meet 1-Clock Alternating Timed Automata. - Shankara Narayanan Krishna; Khushraj Madnani; Paritosh K. Pandya (CONCUR, 2018)

An Algebraic Decision Procedure for Two-Variable Logic with a Between Relation. - Andreas Krebs; Kamal Lodaya; Paritosh K. Pandya; Howard Straubing (CSL, 2018)

Büchi-Kamp Theorems for 1-clock ATA. - Shankara Narayanan Krishna; Khushraj Madnani; Paritosh K. Pandya (CoRR, 2018)

Logical specification and uniform synthesis of robust controllers. - Paritosh K. Pandya; Amol Wakankar (MEMOCODE, 2019)

DCSynth: Guided Reactive Synthesis with Soft Requirements. - Amol Wakankar; Paritosh K. Pandya; Raj Mohan Matteplackel (VSTTE, 2019)

DCSYNTH: A Tool for Guided Reactive Synthesis with Soft Requirements. - Amol Wakankar; Paritosh K. Pandya; Raj Mohan Matteplackel (CoRR, 2019)

Specification and Reactive Synthesis of Robust Controllers. - Paritosh K. Pandya; Amol Wakankar (CoRR, 2019)

Specification and Optimal Reactive Synthesis of Run-time Enforcement Shields. - Paritosh K. Pandya; Amol Wakankar (GandALF, 2019)

Two-variable logics with some betweenness relations: Expressiveness, satisfiability and membership. - Andreas Krebs; Kamal Lodaya; Paritosh K. Pandya; Howard Straubing (Log. Methods Comput. Sci., 2020)

Generalizing Non-punctuality for Timed Temporal Logic with Freeze Quantifiers. - Shankara Narayanan Krishna; Khushraj Madnani; Manuel Mazo Jr.; Paritosh K. Pandya (FM, 2021)

Logics Meet 2-Way 1-Clock Alternating Timed Automata. - Shankara Narayanan Krishna; Khushraj Nanik Madnani; Manuel Mazo Jr.; Paritosh K. Pandya (CoRR, 2021)

Development of Safety-Critical Systems - Architecture and Software - Gopinath Karmakar; Amol Wakankar; Ashutosh Kabra; Paritosh K. Pandya (Springer, 2023)

Satisfiability Checking of Multi-Variable TPTL with Unilateral Intervals Is PSPACE-Complete. - Shankara Narayanan Krishna; Khushraj Nanik Madnani; Rupak Majumdar; Paritosh K. Pandya (CONCUR, 2023)

From Non-punctuality to Non-adjacency: A Quest for Decidability of Timed Temporal Logics with Quantifiers. - Shankara Narayanan Krishna; Khushraj Madnani; Manuel Mazo Jr.; Paritosh K. Pandya (Formal Aspects Comput., 2023)

Openness And Partial Adjacency In One Variable TPTL. - Shankara Narayanan Krishna; Khushraj Madnani; Agnipratim Nag; Paritosh K. Pandya (CoRR, 2024)

Expressive Equivalence Between Decidable Freeze and Metric Timed Temporal Logics. - Hsi-Ming Ho; Shankara Narayanan Krishna; Khushraj Madnani; Rupak Majumdar; Paritosh K. Pandya (CONCUR, 2025)