A detection framework for locating phonetic events. - Partha Niyogi; Partha Mitra; Man Mohan Sondhi (ICSLP, 1998)

Pre-Layout Decoupling Capacitance Estimation and Allocation for Noise-Aware Crypto-System on Chip Applications. - Moumita Chakraborty; Krishnendu Guha; Debasri Saha; Partha Mitra; Amlan Chakrabarti (J. Low Power Electron., 2015)

Pre-layout module wise decap allocation for noise suppression and accurate delay estimation of SoC. - Moumita Chakraborty; Amlan Chakrabarti; Partha Mitra; Debasri Saha; Krishnendu Guha (VDAT, 2016)

Implementation of Universal Modulator Using CORDIC Architecture in FPGA. - Debarshi Datta; Partha Mitra; Himadri Sekhar Dutta (CICBA (1), 2018)

Overfitting or perfect fitting? Risk bounds for classification and regression rules that interpolate. - Mikhail Belkin; Daniel J. Hsu; Partha Mitra (NeurIPS, 2018)

Soft Computing Techniques Based CAD Approach for Power Supply Noise Reduction in System-on-Chip. - Partha Mitra; Angsuman Sarkar (J. Electron. Test., 2020)

Decoupling Capacitor Estimation and Allocation using Optimization Techniques for Power Supply Noise Reduction in System-on-Chip. - Partha Mitra; Jaydeb Bhaumik; Angsuman Sarkar (J. Electron. Test., 2021)

A CAD approach for power supply noise aware floorplan in SoC. - Partha Mitra; Jaydeb Bhaumik; Angsuman Sarkar (Int. J. High Perform. Syst. Archit., 2021)