Altering LUT configuration for wear-out mitigation of FPGA-mapped designs. - Parthasarathy M. B. Rao; Abdulazim Amouri; Saman Kiamehr; Mehdi Baradaran Tahoori (FPL, 2013)

Protecting SRAM-based FPGAs Against Multiple Bit Upsets Using Erasure Codes. - Parthasarathy M. B. Rao; Mojtaba Ebrahimi; Razi Seyyedi; Mehdi Baradaran Tahoori (DAC, 2014)

Low-Cost Multiple Bit Upset Correction in SRAM-Based FPGA Configuration Frames. - Mojtaba Ebrahimi; Parthasarathy Murali B. Rao; Razi Seyyedi; Mehdi Baradaran Tahoori (IEEE Trans. Very Large Scale Integr. Syst., 2016)