A Background DAC Error Estimation in Sigma-Delta ADCs using a Pseudo Random Noise based Correlation Technique. - Pascal Witte; Maurits Ortmanns (ISCAS, 2009)

Hardware complexity of a correlation based background DAC error estimation technique for sigma-delta ADCs. - Pascal Witte; Carsten Noeske; Maurits Ortmanns (ISCAS, 2010)

Background DAC Error Estimation Using a Pseudo Random Noise Based Correlation Technique for Sigma-Delta Analog-to-Digital Converters. - Pascal Witte; Maurits Ortmanns (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization. - John G. Kauffman; Pascal Witte; Joachim Becker; Maurits Ortmanns (ISSCC, 2011)

An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR. - John G. Kauffman; Pascal Witte; Joachim Becker; Maurits Ortmanns (IEEE J. Solid State Circuits, 2011)

A Correlation-Based Background Error Estimation Technique for Bandpass Delta-Sigma ADC DACs. - Pascal Witte; John G. Kauffman; Joachim Becker; Maurits Ortmanns (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

An error estimation technique for lowpass and bandpass ΣΔ ADC feedback DACs using a residual test signal. - Pascal Witte; John G. Kauffman; Timon Brückner; Joachim Becker; Maurits Ortmanns (ISCAS, 2012)

A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW. - Pascal Witte; John G. Kauffman; Joachim Becker; Yiannos Manoli; Maurits Ortmanns (ISSCC, 2012)

A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW. - John G. Kauffman; Pascal Witte; Matthias Lehmann; Joachim Becker; Yiannos Manoli; Maurits Ortmanns (IEEE J. Solid State Circuits, 2014)

A Noise-Canceling SMASH Architecture for Discrete-Time Bandpass Delta-Sigma ADCs. - Jesko Flemming; Bernhard Wicht; Pascal Witte (ISCAS, 2023)

Stability Analysis for Frequency Tunable Bandpass Delta-Sigma ADC Architectures. - Jesko Flemming; Bernhard Wicht; Pascal Witte (SMACD, 2023)

A DAC Sharing and Linearization Technique for Time-Interleaved Incremental Delta-Sigma ADCs. - Jesko Flemming; Bernhard Wicht; Pascal Witte (ISCAS, 2024)

A Hardware Efficient Digital DAC Linearization Topology for Delta-Sigma ADCs. - Jesko Flemming; Timon Rogge; Bernhard Wicht; Pascal Witte (SMACD, 2024)