An evolutionary approach for test program compaction. - Riccardo Cantoro; Marco Gaudesi; Ernesto Sánchez 001; Pasquale Davide Schiavone; Giovanni Squillero (LATS, 2015)

Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications. - Pasquale Davide Schiavone; Francesco Conti 001; Davide Rossi; Michael Gautschi; Antonio Pullini; Eric Flamand; Luca Benini (PATMOS, 2017)

An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics. - Francesco Conti 001; Robert Schilling; Pasquale Davide Schiavone; Antonio Pullini; Davide Rossi; Frank Kagan Gürkaynak; Michael Muehlberghuber; Michael Gautschi; Igor Loi; Germain Haugou; Stefan Mangard; Luca Benini (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices. - Michael Gautschi; Pasquale Davide Schiavone; Andreas Traber; Igor Loi; Antonio Pullini; Davide Rossi; Eric Flamand; Frank K. Gürkaynak; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Fast and Accurate Multiclass Inference for MI-BCIs Using Large Multiscale Temporal and Spectral Features. - Michael Hersche; Tino Rellstab; Pasquale Davide Schiavone; Lukas Cavigelli; Luca Benini; Abbas Rahimi (EUSIPCO, 2018)

An Open-Source Verification Framework for Open-Source Cores: A RISC-V Case Study. - Pasquale Davide Schiavone; Ernesto Sánchez 001; Annachiara Ruospo; Francesco Minervini; Florian Zaruba; Germain Haugou; Luca Benini (VLSI-SoC, 2018)

A sensor fusion approach for drowsiness detection in wearable ultra-low-power systems. - Victor Javier Kartsch; Simone Benatti; Pasquale Davide Schiavone; Davide Rossi; Luca Benini (Inf. Fusion, 2018)

XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference. - Francesco Conti 001; Pasquale Davide Schiavone; Luca Benini (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification. - Annachiara Ruospo; Riccardo Cantoro; Ernesto Sánchez 001; Pasquale Davide Schiavone; Angelo Garofalo; Luca Benini (DFT, 2019)

Neuro-PULP: A Paradigm Shift Towards Fully Programmable Platforms for Neural Interfaces. - Pasquale Davide Schiavone; Davide Rossi; Yan Liu 016; Simone Benatti; Song Luan; Ian Williams; Luca Benini; Timothy G. Constandinou (AICAS, 2020)

Always-On 674uW @ 4GOP/s Error Resilient Binary Neural Networks with Aggressive SRAM Voltage Scaling on a 22nm IoT End-Node. - Alfio Di Mauro; Francesco Conti 001; Pasquale Davide Schiavone; Davide Rossi; Luca Benini (CoRR, 2020)

Always-On 674μ W@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node. - Alfio Di Mauro; Francesco Conti 001; Pasquale Davide Schiavone; Davide Rossi; Luca Benini (IEEE Trans. Circuits Syst., 2020)

Tiny-FPU: Low-Cost Floating-Point Support for Small RISC-V MCU Cores. - Luca Bertaccini; Matteo Perotti; Stefan Mach; Pasquale Davide Schiavone; Florian Zaruba; Luca Benini (ISCAS, 2021)

Arnold: An eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End Nodes. - Pasquale Davide Schiavone; Davide Rossi; Alfio Di Mauro; Frank K. Gürkaynak; Timothy Saxe; Mao Wang; Ket Chong Yap; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2021)

sEMG Neural Spikes Reconstruction for Gesture Recognition on a Low-Power Multicore Processor. - Mattia Orlandi; Marcello Zanghieri; Victor Javier Kartsch Morinigo; Francesco Conti 001; Pasquale Davide Schiavone; Luca Benini; Simone Benatti (BioCAS, 2022)

Motor-Unit Ordering of Blindly-Separated Surface-EMG Signals for Gesture Recognition. - Mattia Orlandi; Marcello Zanghieri; Pasquale Davide Schiavone; Elisa Donati; Francesco Conti 001; Simone Benatti (SYSINT, 2022)

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller. - Pasquale Davide Schiavone; Simone Machetti; Miguel Peón-Quirós; José Miranda; Benoît W. Denkinger; Thomas Christoph Müller; Rubén Rodríguez Álvarez; Saverio Nasturzio; David Atienza Alonso (CF, 2023)

Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA. - Nicolò Carpentieri; Juan Sapriza; Pasquale Davide Schiavone; Daniele Jahier Pagliari; David Atienza; Maurizio Martina; Alessio Burrello (CF (Companion), 2024)

Cross-layer Exploration of 2.5D Energy-Efficient Heterogeneous Chiplets Integration: From System Simulation to Open Hardware. - Anna Burdina; Gabriel Catel Torres; Pasquale Davide Schiavone; Miguel Peón-Quirós; Giovanni Ansaloni; David Atienza; Marina Zapater (ISLPED, 2024)

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators. - Simone Machetti; Pasquale Davide Schiavone; Thomas Christoph Müller; Miguel Peón-Quirós; David Atienza (CoRR, 2024)

STRELA: STReaming ELAstic CGRA Accelerator for Embedded Systems. - Daniel Vázquez; José Miranda; Alfonso Rodríguez 002; Andrés Otero; Pasquale Davide Schiavone; David Atienza (CoRR, 2024)

Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes. - Michele Caon; Clément Choné; Pasquale Davide Schiavone; Alexandre Levisse; Guido Masera; Maurizio Martina; David Atienza (CoRR, 2024)

MetaWearS: A Shortcut in Wearable Systems Lifecycle with Only a Few Shots. - Alireza Amirshahi; Maedeh H. Toosi; Siamak Mohammadi; Stefano Albini; Pasquale Davide Schiavone; Giovanni Ansaloni; Amir Aminifar; David Atienza (CoRR, 2024)

Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications. - Danilo Cammarata; Matteo Perotti; Marco Bertuletti; Angelo Garofalo; Pasquale Davide Schiavone; David Atienza; Luca Benini (CF (Companion), 2025)

Just TestIt! An SBST Approach To Automate System-Integration Testing. - Tommaso Terzano; Luigi Giuffrida; Juan Sapriza; Pasquale Davide Schiavone; Guido Masera; David Atienza; Luciano Lavagno; Maurizio Martina (CF (Companion), 2025)

A Reconfigurable High-Dynamic Range ∆Σ Front-End with Event-Based Decimation for Bandwidth-Efficient Implantable Neural Interfaces. - Natalia Martínez; Juan Sapriza; Pasquale Davide Schiavone; Giovanni Ansaloni; Luke Bashford; Andrew Jackson 001; David Atienza; Timothy G. Constandinou (ISCAS, 2025)

X-HEEP: An Open-Source, Configurable and Extendible RISC-V Platform for TinyAI Applications. - Simone Machetti; Pasquale Davide Schiavone; Giovanni Ansaloni; Miguel Peón-Quirós; David Atienza (ISVLSI, 2025)

Increasing the Energy-Efficiency of Wearables Using Low-Precision Posit Arithmetic with PHEE. - David Mallasén; Pasquale Davide Schiavone; Alberto A. Del Barrio; Manuel Prieto-Matías; David Atienza (CoRR, 2025)

ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions. - Vincenzo Petrolo; Flavia Guella; Michele Caon; Pasquale Davide Schiavone; Guido Masera; Maurizio Martina (CoRR, 2025)

e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications. - Simone Machetti; Pasquale Davide Schiavone; Lara Orlandic; Darong Huang; Deniz Kasap; Giovanni Ansaloni; David Atienza (CoRR, 2025)

BiomedBench: A Benchmark Suite of TinyML Biomedical Applications for Low-Power Wearables. - Dimitrios Samakovlis; Stefano Albini; Rubén Rodríguez Álvarez; Denisa-Andreea Constantinescu; Pasquale Davide Schiavone; Miguel Peón-Quirós; David Atienza (IEEE Des. Test, 2025)