A multi-purpose speech recognition system. - L. Buisson; G. Mercier; Patrice Quinton; R. Vives (ICASSP, 1976)

A syntactic analyzer adapted to speech recognition. - Patrice Quinton (ICASSP, 1976)

A systolic algorithm for connected word recognition. - Jean-Pierre Banâtre; Patrice Frison; Patrice Quinton (ICASSP, 1982)

From speech recognition to speech understanding : A case study of Keal. - Dominique Gillet; Patrice Quinton; Jacques Siroux (ICASSP, 1982)

Constructing parallel programs and their termination proof. - Jean-Pierre Banâtre; Michel Banâtre; Patrice Quinton (ICPP, 1982)

A Network for the Detection of Words in Continuous Speech. - Jean-Pierre Banâtre; Patrice Frison; Patrice Quinton (Acta Informatica, 1982)

A Theorem-Prover for a Decidable Subset of Default Logic. - Philippe Besnard; Rene Quiniou; Patrice Quinton (AAAI, 1983)

A VLSI parallel machine for speech recognition. - Patrice Frison; Patrice Quinton (ICASSP, 1984)

Automatic Synthesis of Systolic Arrays from Uniform Recurrent Equations. - Patrice Quinton (ISCA, 1984)

An Introduction to Systolic Architectures. - Patrice Quinton (Future Parallel Computers, 1986)

Systolic architectures for connected speech recognition. - François Charot; Patrice Frison; Patrice Quinton (IEEE Trans. Acoust. Speech Signal Process., 1986)

Systolic solution of linear systems over GF(p) with partial pivoting. - Bertrand Hochet; Patrice Quinton; Yves Robert (IEEE Symposium on Computer Arithmetic, 1987)

Alpha du centaur: a prototype environment for the design of parallel regular alorithms. - Pierrick Gachet; Christophe Mauras; Patrice Quinton; Yannick Saouter (ICS, 1989)

Systolic Gaussian Elimination over GF(p) with Partial Pivoting. - Bertrand Hochet; Patrice Quinton; Yves Robert (IEEE Trans. Computers, 1989)

The mapping of linear recurrence equations on regular arrays. - Patrice Quinton; Vincent Van Dongen (J. VLSI Signal Process., 1989)

Scheduling affine parameterized recurrences by means of Variable Dependent Timing Functions. - Christophe Mauras; Patrice Quinton; Sanjay V. Rajopadhye; Yannick Saouter (ASAP, 1990)

Synthesis of a New Systolic Architecture for the Algebraic Path Problem. - Abdelhamid Benaini; Patrice Quinton; Yves Robert; Yannick Saouter; Bernard Tourancheau (Sci. Comput. Program., 1990)

Systolic algorithms and architectures. - Patrice Quinton; Yves Robert (Prentice Hall, 1991)

Synthesis of systolic arrays by equation transformations. - Catherine Dezan; Eric Gautrin; Hervé Le Verge; Patrice Quinton; Yannick Saouter (ASAP, 1991)

The Alpha du Centaur environment. - Catherine Dezan; Hervé Le Verge; Patrice Quinton; Yannick Saouter (Algorithms and Parallel VLSI Architectures, 1991)

Algorithms and Parallel VLSI Architectures. - Patrice Quinton; Yves Robert (Algorithms and Parallel VLSI Architectures, 1991)

The Palindrome Systolic Array Revisited. - Hervé Le Verge; Patrice Quinton (Research Directions in High-Level Parallel Programming Languages, 1991)

The ALPHA language and its use for the design of systolic arrays. - Hervé Le Verge; Christophe Mauras; Patrice Quinton (J. VLSI Signal Process., 1991)

Efficient Linear Systolic Array for the Knapsack Problem. - Rumen Andonov; Patrice Quinton (CONPAR, 1992)

From Equations to Hardware: Towards Systematic Mapping of Algorithms onto Parallel Architectures. - François Charot; Patrice Frison; Eric Gautrin; Dominique Lavenier; Patrice Quinton; Charles Wagner (ICPIA, 1992)

Systolic Convolution of Arithmetic Functions. - Patrice Quinton; Yves Robert (Theor. Comput. Sci., 1992)

Introduction to the special issue on algorithms and architectures. - Patrice Quinton; Yves Robert (Integr., 1993)

Computability of recurrence equations. - Yannick Saouter; Patrice Quinton (Theor. Comput. Sci., 1993)

Verification of regular architectures using ALPHA: a case study. - Catherine Dezan; Patrice Quinton (ASAP, 1994)

Towards a multi-formalism framework for architectural synthesis: the ASAR project. - Michel Auguin; Mohamed Belhadj; Judith Benzakki; C. Carrière; Guy Durrieu; Thierry Gautier; Michel Israël; Paul Le Guernic; Michel Lemaître; E. Martin; Patrice Quinton; Laurence Rideau; et al. (CODES, 1994)

Pure Systolic Array for a Class of Dynamic Dependency Recurrences. - Rumen Andonov; Patrice Quinton; Sanjay V. Rajopadhye; Doran Wilde (Parcella, 1994)

Systolic Arrays: Why and How? - Patrice Quinton (Parcella, 1994)

From Equations to Hardware. Towards the Systematic Mapping of Algorithms onto Parallel Architectures. - Patrice Frison; François Charot; Eric Gautrin; Dominique Lavenier; Patrice Quinton; Frédéric Raimbault; Charles Wagner (Int. J. Pattern Recognit. Artif. Intell., 1994)

Deriving Imperative Code from Functional Programs. - Patrice Quinton; Sanjay V. Rajopadhye; Doran Wilde (FPCA, 1995)

On deriving data parallel code from a functional program. - Patrice Quinton; Sanjay V. Rajopadhye; Doran Wilde (IPPS, 1995)

A Shift Registered-Based Systolic Array for the Unbounded Knapsack Problem. - Rumen Andonov; Patrice Quinton; Sanjay V. Rajopadhye; Doran Wilde (Parallel Process. Lett., 1995)

Extension Of The Alpha Language To Recurrences On Sparse Periodic Domains. - Patrice Quinton; Sanjay V. Rajopadhye; Tanguy Risset (ASAP, 1996)

Design and Implementation of a Parallel Architecture for Biological Sequence Comparison. - Pascale Guerdoux-Jamet; Dominique Lavenier; Charles Wagner; Patrice Quinton (Euro-Par, Vol. I, 1996)

On Manipulating Z-Polyhedra Using a Canonical Representation. - Patrice Quinton; Sanjay V. Rajopadhye; Tanguy Risset (Parallel Process. Lett., 1997)

Linear Programming Models for Scheduling Systems of Affine Recurrence Equations - A Comparative Study. - Stephan Balev; Patrice Quinton; Sanjay V. Rajopadhye; Tanguy Risset (SPAA, 1998)

Automatic Design of VLSI Pipelined LMS Architectures. - Anne-Claire Guillou; Patrice Quinton; Tanguy Risset; Daniel Massicotte (PARELEC, 2000)

Derivation of systolic algorithms for the algebraic path problem by recurrence transformations. - Clémentin Tayou Djamégni; Patrice Quinton; Sanjay V. Rajopadhye; Tanguy Risset (Parallel Comput., 2000)

Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms. - David Cachera; Patrice Quinton; Sanjay V. Rajopadhye; Tanguy Risset (IPDPS, 2001)

Structured Scheduling of Recurrence Equations: Theory and Practice. - Patrice Quinton; Tanguy Risset (Embedded Processor Design Challenges, 2002)

Scheduling reductions on realistic machines. - Gautam Gupta; Sanjay V. Rajopadhye; Patrice Quinton (SPAA, 2002)

Hardware Synthesis for Multi-Dimensional Time. - Anne-Claire Guillou; Patrice Quinton; Tanguy Risset (ASAP, 2003)

Modeling and Scheduling Parallel Data Flow Systems using Structured Systems of Recurrence Equations. - François Charot; Madeleine Nyamsi; Patrice Quinton; Charles Wagner (ASAP, 2004)

Architecture Exploration for 3G Telephony Applications Using a Hardware-Software Prototyping Platform. - François Charot; Madeleine Nyamsi; Patrice Quinton; Charles Wagner (SAMOS, 2004)

Acceleration of a content-based image-retrieval application on the RDISK cluster. - Auguste Noumsi; Steven Derrien; Patrice Quinton (IPDPS, 2006)

Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval. - Rayan Chikhi; Steven Derrien; Auguste Noumsi; Patrice Quinton (ARC, 2007)

Parallelizing HMMER for Hardware Acceleration on FPGAs. - Steven Derrien; Patrice Quinton (ASAP, 2007)

Hardware synthesis for systems of recurrence equations with multidimensional schedule. - Anne-Claire Guillou; Patrice Quinton; Tanguy Risset (Int. J. Embed. Syst., 2008)

A reindexing based approach towards mapping of DAG with affine schedules onto parallel embedded systems. - Clémentin Tayou Djamégni; Patrice Quinton; Sanjay V. Rajopadhye; Tanguy Risset; Maurice Tchuenté (J. Parallel Distributed Comput., 2009)

Accelerating HMMER on FPGA using parallel prefixes and reductions. - Naeem Abbas; Steven Derrien; Sanjay V. Rajopadhye; Patrice Quinton (FPT, 2010)

Hardware Acceleration of HMMER on FPGAs. - Steven Derrien; Patrice Quinton (J. Signal Process. Syst., 2010)

Efficient nested loop pipelining in high level synthesis using polyhedral bubble insertion. - Antoine Morvan; Steven Derrien; Patrice Quinton (FPT, 2011)

ompVerify: Polyhedral Analysis for the OpenMP Programmer. - V. Basupalli; Tomofumi Yuki; Sanjay V. Rajopadhye; Antoine Morvan; Steven Derrien; Patrice Quinton; David Wonnacott (IWOMP, 2011)

Disruption-tolerant wireless biomedical monitoring for marathon runners: A feasibility study. - Djamel Benferhat; Frédéric Guidec; Patrice Quinton (WPMC, 2011)

Scheduling Algorithms. - Patrice Quinton (Encyclopedia of Parallel Computing, 2011)

Intellectual Property (IP) Integration Approach for Data-Flow Parallel Embedded Systems. - Anne-Marie Chana; Patrice Quinton (AFRICOMM, 2012)

Disruption-tolerant wireless sensor networking for biomedical monitoring in outdoor conditions. - Djamel Benferhat; Frédéric Guidec; Patrice Quinton (BODYNETS, 2012)

Biomedical Monitoring of Non-hospitalized Subjects Using Disruption-Tolerant Wireless Sensors. - Frédéric Guidec; Djamel Benferhat; Patrice Quinton (MobiHealth, 2012)

Efficient hardware implementation of data-flow parallel embedded systems. - Patrice Quinton; Anne-Marie Chana; Steven Derrien (ICSAMOS, 2012)

Cardiac Monitoring of Marathon Runners Using Disruption-Tolerant Wireless Sensors. - Djamel Benferhat; Frédéric Guidec; Patrice Quinton (UCAmI, 2012)

Circuits parallèles à l'Irisa dans les années 1980. - Patrice Frison; Patrice Quinton (Tech. Sci. Informatiques, 2012)

Polyhedral Bubble Insertion: A Method to Improve Nested Loop Pipelining for High-Level Synthesis. - Antoine Morvan; Steven Derrien; Patrice Quinton (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Component reuse methodology for multi-clock Data-Flow parallel embedded Systems. - Anne-Marie Chana; Patrice Quinton; Steven Derrien (ARIMA J., 2014)

Disruption-Tolerant Wireless Sensor Networking for Biomedical Monitoring in Outdoor Conditions - Monitoring the Cardiac Activity of Marathon Runners using DTN Techniques. - Frédéric Guidec; Djamel Benferhat; Patrice Quinton (Mob. Networks Appl., 2014)

Combining execution pipelines to improve parallel implementation of HMMER on FPGA. - Naeem Abbas; Steven Derrien; Sanjay V. Rajopadhye; Patrice Quinton; Alexandre Cornu; Dominique Lavenier (Microprocess. Microsystems, 2015)