Performance and complexity of block turbo decoder circuits. - Patrick Adde; Ramesh Pyndiah; Olivier Raoul (ICECS, 1996)

Turbo-decoder synchronisation procedure: application to the CAS5093 integrated circuit. - Pascale Ferry; Patrick Adde; Gérard Graton (ICECS, 1996)

Design and performance of a product code turbo encoding-decoding prototype. - Patrick Adde; Ramesh Pyndiah; Fabien Buda (Ann. des Télécommunications, 1999)

Block turbo codes: towards implementation. - Sylvie Kerouédan; Patrick Adde (ICECS, 2001)

How we implemented block turbo codes? - Sylvie Kerouédan; Patrick Adde; Ramesh Pyndiah (Ann. des Télécommunications, 2001)

New architecture for high data rate turbo decoding of product codes. - Javier Cuevas; Patrick Adde; Sylvie Kerouédan; Ramesh Pyndiah (GLOBECOM, 2002)

Efficient architecture for Reed Solomon block turbo code. - Erwan Piriou; Christophe Jégo; Patrick Adde; Raphaël Le Bidan; Michel Jézéquel (ISCAS, 2006)

A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes. - Erwan Piriou; Christophe Jégo; Patrick Adde; Michel Jézéquel (ISVLSI, 2006)

Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. - Erwan Piriou; Christophe Jégo; Patrick Adde; Michel Jézéquel (ReCoSoC, 2006)

Information Theory Turbo decoding of product codes for Gigabit per second applications and beyond. - Javier Cuevas; Patrick Adde; Sylvie Kerouédan (Eur. Trans. Telecommun., 2006)

Some Results on the Binary Minimum Distance of Reed-Solomon Codes and Block Turbo Codes. - Raphaël Le Bidan; Ramesh Pyndiah; Patrick Adde (ICC, 2007)

Towards Gb/s turbo decoding of product code onto an FPGA device. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel (ISCAS, 2007)

Architecture de turbo-décodeur en blocs entièrement parallèle pour la transmission de données au-delà du Gbit/s. - Christophe Jégo; Patrick Adde; Camille Leroux (Ann. des Télécommunications, 2007)

On the higher efficiency of parallel Reed-Solomon turbo-decoding. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel (ICECS, 2008)

A highly parallel Turbo Product Code decoder without interleaving resource. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel; Deepak Gupta (SiPS, 2008)

Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design. - Raphaël Le Bidan; Camille Leroux; Christophe Jégo; Patrick Adde; Ramesh Pyndiah (EURASIP J. Wirel. Commun. Netw., 2008)

High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel (J. Signal Process. Syst., 2009)

Design and implementation of a soft-decision decoder for Cortex codes. - Patrick Adde; Christophe Jégo; Raphaël Le Bidan; Jorge Ernesto Pérez Chamorro (ICECS, 2010)

A Turbo Decoder Included in a Multi-User Detector: A Solution to be Retained. - Sylvie Kerouédan; Makram Touzri; Patrick Adde; Samir Saoudi (Int. J. Commun. Netw. Syst. Sci., 2010)

Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. - Camille Leroux; Christophe Jégo; Patrick Adde; Deepak Gupta; Michel Jézéquel (J. Signal Process. Syst., 2011)

A low-complexity soft-decision decoding architecture for the binary extended Golay code. - Patrick Adde; Raphaël Le Bidan (ICECS, 2012)

Design of an Efficient Maximum Likelihood Soft Decoder for Systematic Short Block Codes. - Patrick Adde; Daniel Gomez Toro; Christophe Jégo (IEEE Trans. Signal Process., 2012)